Support 3D Custom Switch Blocks #2370

saaramahmoudi · 2023-08-15T20:47:52Z

Description

This pull request support 3d custom switch blocks in the architecture file and automatically add the inter-die edges between tracks in different layer to RR graph.

Types of changes

Bug fix (change which fixes an issue)
New feature (change which adds functionality)
Breaking change (fix or feature that would cause existing functionality to change)

Checklist:

My change requires a change to the documentation
I have updated the documentation accordingly
I have added tests to cover my changes
All new and existing tests passed

…et switchblock pattern custom work for 3d

…sed on layer number

…orrect chan

…more than one layer

…nal nodes have been defined

… for sb

…th channel from one layer to another

…t custom switch blocks

…f edge generation

…nodes

…rilog-to-routing into 3d_track_to_track_conn

…locks

…tom fanin fanout

vaughnbetz · 2024-05-21T13:15:35Z

vpr/src/base/read_options.cpp

@@ -2461,6 +2461,13 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio
        .default_value("false")
        .show_in(argparse::ShowIn::HELP_ONLY);

+    route_grp.add_argument(args.custom_3d_sb_fanin_fanout, "--custom_3d_sb_fanin_fanout")


This seems like it would fit better in the arch file (as a new parameter) than as a command line parameter. What do you think?

I also think that it might be better to put it in the architecture file, but for now I just keep it as it is to make the testing easier with command line option. When the branch is final, I will talk to you about the architecture change.

vaughnbetz · 2024-05-21T13:18:41Z

vpr/src/route/rr_graph2.cpp

@@ -2333,7 +2338,7 @@ static void get_switchblocks_edges(RRGraphBuilder& rr_graph_builder,
                ++edge_count;

                //we only add the following edge between intermediate nodes once for the first 3D connection for each pair of intermediate nodes


Is there a big comment somewhere saying how custom_3d_sb_fanin_fanout works? It should detail exactly what the rr graph this generates looks like.

vaughnbetz · 2024-05-21T13:20:41Z

Quite a few CI failures ... can you take a look @saaramahmoudi ?

saaramahmoudi · 2024-05-21T13:39:21Z

Quite a few CI failures ... can you take a look @saaramahmoudi ?

Yes, I will. But before that, we still have some routing problem that might be related to router lookahead. I already talked to @amin1377, and he agreed to take a look into the new commits. After we found all bugs, I will investigate CI issues.

…rilog-to-routing into 3d_track_to_track_conn

vaughnbetz · 2024-08-16T14:50:28Z

Please go ahead and merge this after the conflicts are resolved, and a QoR test on Titan to ensure 2D QoR isn't affected.
There are two comments above that should go in an issue to resolve afterwards:

move --custom_3d_sb_fanin_fanout to the architecture file as a new tag, rather than as a command line option. It should go in the section.
Add a big comment somewhere (maybe in rr_graph.cpp) about how custom_3d_sb_fanin_fanout works. It should detail exactly what the rr graph this generates looks like.

vaughnbetz · 2024-08-16T14:54:04Z

Issue #2694 is tracking the updates listed above.

…rilog-to-routing into 3d_track_to_track_conn

…r is added to the heap

amin1377 · 2024-09-13T13:36:02Z

2D Titan QoR:

2D large VTR:

vaughnbetz · 2024-09-13T14:39:48Z

vpr/src/route/connection_router.cpp

@@ -1015,6 +1019,10 @@ t_bb ConnectionRouter<Heap>::add_high_fanout_route_tree_to_heap(
                if (!inside_bb(rr_node_to_add, net_bounding_box))
                    continue;

+                auto rt_node_layer_num = rr_graph_->node_layer(rr_node_to_add);


Need to comment what you are doing here and why.

vaughnbetz · 2024-09-13T14:40:52Z

Looks good. One commenting update requested, plus we should add the missing comments I flagged before. I'll create an issue to track that.

vaughnbetz · 2024-09-13T14:46:32Z

3D arch status:

Connecting across layers with OPINs (full or partial) works in this PR as well as it does on the master. @amin1377 please add data once you have it.
Connecting via 3D switch block does not work well
- Router lookahead takes a long time to create (Amin thinks about 3x as long). The data in it looks reasonable though.
- Router cannot resolve congestion.
- Both issues exist on the master branch so we can merge anyway.

saaramahmoudi added 11 commits August 3, 2023 19:21

extended e_side structure to contain above layer and below layer to g…

4af1381

…et switchblock pattern custom work for 3d

refactor for loops with e_side as iterator to always use SIDES array

a3393e9

refactor index_into_correct_chan for custom switchblocks

76f7419

make format

4ff0ed6

removed the update that will change rr_graph for 2d cases

81155d5

modified the functions to determine custom switch blocks locations ba…

2b93973

…sed on layer number

modified index_into_correct_chan to consider layers to index to the c…

17beb30

…orrect chan

modified wireconnection parsing while using custom switchblocks with …

08cf7e9

…more than one layer

added edges to connect track to track in different layers, no additio…

92ebe0f

…nal nodes have been defined

factor out the get_switchblocks_edges function and connect two layers…

f00977f

… for sb

make format

f31a5fa

github-actions bot added VPR VPR FPGA Placement & Routing Tool libarchfpga Library for handling FPGA Architecture descriptions labels Aug 15, 2023

saaramahmoudi added 5 commits August 17, 2023 14:20

updated parsing custom switchblocks architecture syntax to connect bo…

8cbfc30

…th channel from one layer to another

Merge branch 'master' into 3d_track_to_track_conn

84a5763

add extra nodes (CHANX) in switchblocks with length = 0

50fbfce

make format

4dac4a5

Merge branch 'master' into 3d_track_to_track_conn

99a7f2a

saaramahmoudi force-pushed the 3d_track_to_track_conn branch from 1bfc97f to 99a7f2a Compare August 31, 2023 22:27

saaramahmoudi added 11 commits August 31, 2023 18:28

Merge branch 'master' into 3d_track_to_track_conn

9c6c9ad

add extra nodes for track-to-track connections in rr graph

3939af1

set node attributes for custom extra nodes added to rrgraph to suppor…

15be495

…t custom switch blocks

make format

e71b4a5

added track-to_track edges to correct node index in rr_graph

2fe5adf

changed the hash function for sb_conn_map to use vtr::hash_combine

93d6b31

factor out counting extra nodes

0891ca8

debug: chanx nodes should have been added by (y,x)

aa804c2

removed extra TODOs and uncomment check_rr_graph

6ba6321

minor bug: offset to extra nodes was assigned to zero in the middle o…

b0b6f5d

…f edge generation

update rr_graph serializer to have NONE as direction for extra chanx …

eba99d2

…nodes

saaramahmoudi added 5 commits April 19, 2024 14:37

Merge branch 'master' of https://github.com/verilog-to-routing/vtr-ve…

f46a775

…rilog-to-routing into 3d_track_to_track_conn

only resize the 3D SB matrix if it is being used

a3a3599

Merge branch 'master' into 3d_track_to_track_conn

1309a04

added support for fan-out for intermediate nodes in 3D custom switchb…

6ede692

…locks

removed dead code and added the command line option to control 3D cus…

006675f

…tom fanin fanout

vaughnbetz reviewed May 21, 2024

View reviewed changes

amin1377 added 5 commits May 29, 2024 15:16

[vpr][router] print layer num of to block

620fd73

Merge branch 'master' of https://github.com/verilog-to-routing/vtr-ve…

a38913c

…rilog-to-routing into 3d_track_to_track_conn

[git] add .cache to git ignore

792c276

[log] fix printing location for 3d loc

377aed4

[vpr][route] print net num in log msg

832d967

amin1377 mentioned this pull request Aug 16, 2024

Test rr-graph write out and read in with a 3D architecture. #2593

Closed

[test][strong] add strong 3d graph

8a7a330

vaughnbetz mentioned this pull request Aug 16, 2024

3D switch block updates & commenting #2694

Open

amin1377 added 5 commits August 27, 2024 19:06

Merge branch 'master' of https://github.com/verilog-to-routing/vtr-ve…

a909cf2

…rilog-to-routing into 3d_track_to_track_conn

[vpr][route] fix seg fault when router debug is enabled

174bb0f

Merge branch 'master' of https://github.com/verilog-to-routing/vtr-ve…

1cebe67

…rilog-to-routing into 3d_track_to_track_conn

[vpr][route] add all route tree nodes if no node from the target laye…

c078262

…r is added to the heap

[vpr][base] fix the bug with format coordinate (3d)

b681f8d

vaughnbetz reviewed Sep 13, 2024

View reviewed changes

vaughnbetz merged commit 85c9928 into master Sep 13, 2024
36 of 52 checks passed

vaughnbetz deleted the 3d_track_to_track_conn branch September 13, 2024 14:46

vaughnbetz mentioned this pull request Sep 13, 2024

Improve 3D switch block commenting and move command line option to arch file #2722

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Support 3D Custom Switch Blocks #2370

Support 3D Custom Switch Blocks #2370

saaramahmoudi commented Aug 15, 2023 •

edited by vaughnbetz

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saaramahmoudi May 21, 2024

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vaughnbetz commented May 21, 2024

saaramahmoudi commented May 21, 2024 •

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vaughnbetz commented Aug 16, 2024

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amin1377 commented Sep 13, 2024 •

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vaughnbetz Sep 13, 2024

vaughnbetz commented Sep 13, 2024

vaughnbetz commented Sep 13, 2024

		@@ -2333,7 +2338,7 @@ static void get_switchblocks_edges(RRGraphBuilder& rr_graph_builder,
		++edge_count;

		//we only add the following edge between intermediate nodes once for the first 3D connection for each pair of intermediate nodes

Support 3D Custom Switch Blocks #2370

Support 3D Custom Switch Blocks #2370

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saaramahmoudi commented Aug 15, 2023 • edited by vaughnbetz Loading

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Checklist:

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saaramahmoudi commented Aug 15, 2023 •

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amin1377 commented Sep 13, 2024 •

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