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Support 3D Custom Switch Blocks #2370
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4af1381
extended e_side structure to contain above layer and below layer to g…
saaramahmoudi a3393e9
refactor for loops with e_side as iterator to always use SIDES array
saaramahmoudi 76f7419
refactor index_into_correct_chan for custom switchblocks
saaramahmoudi 4ff0ed6
make format
saaramahmoudi 81155d5
removed the update that will change rr_graph for 2d cases
saaramahmoudi 2b93973
modified the functions to determine custom switch blocks locations ba…
saaramahmoudi 17beb30
modified index_into_correct_chan to consider layers to index to the c…
saaramahmoudi 08cf7e9
modified wireconnection parsing while using custom switchblocks with …
saaramahmoudi 92ebe0f
added edges to connect track to track in different layers, no additio…
saaramahmoudi f00977f
factor out the get_switchblocks_edges function and connect two layers…
saaramahmoudi f31a5fa
make format
saaramahmoudi 8cbfc30
updated parsing custom switchblocks architecture syntax to connect bo…
saaramahmoudi 84a5763
Merge branch 'master' into 3d_track_to_track_conn
saaramahmoudi 50fbfce
add extra nodes (CHANX) in switchblocks with length = 0
saaramahmoudi 4dac4a5
make format
saaramahmoudi 99a7f2a
Merge branch 'master' into 3d_track_to_track_conn
saaramahmoudi 9c6c9ad
Merge branch 'master' into 3d_track_to_track_conn
saaramahmoudi 3939af1
add extra nodes for track-to-track connections in rr graph
saaramahmoudi 15be495
set node attributes for custom extra nodes added to rrgraph to suppor…
saaramahmoudi e71b4a5
make format
saaramahmoudi 2fe5adf
added track-to_track edges to correct node index in rr_graph
saaramahmoudi 93d6b31
changed the hash function for sb_conn_map to use vtr::hash_combine
saaramahmoudi 0891ca8
factor out counting extra nodes
saaramahmoudi aa804c2
debug: chanx nodes should have been added by (y,x)
saaramahmoudi 6ba6321
removed extra TODOs and uncomment check_rr_graph
saaramahmoudi b0b6f5d
minor bug: offset to extra nodes was assigned to zero in the middle o…
saaramahmoudi eba99d2
update rr_graph serializer to have NONE as direction for extra chanx …
saaramahmoudi e55ecc8
debug: memory leak in rr_node_indices_ fixed
saaramahmoudi 4e8580c
make format
saaramahmoudi c89ccf2
merge with master branch - conflicts solved
saaramahmoudi 1d5eb35
generate_rr_graph_serializer
saaramahmoudi 96aed46
resolved conflicts
saaramahmoudi f0d29f1
add support to read back rr graph with NONE direction CHANX nodes
saaramahmoudi 6e44ce0
add one extra node per one destination in each switchblocks
saaramahmoudi 830965c
debug: extra nodes was calculated incorrectly
saaramahmoudi 45b890b
avoid adding same edge between chanx->chanx multiple times
saaramahmoudi 17709bf
Merge branch 'master' of https://github.com/verilog-to-routing/vtr-ve…
saaramahmoudi 5e12d1d
avoid adding same edge multiple times
saaramahmoudi 91f016a
Merge branch 'master' of https://github.com/verilog-to-routing/vtr-ve…
saaramahmoudi 1ada54e
fixed extra chanx connections between dice in rr graph
saaramahmoudi 1370c03
removed unnecessary loop in the switchblocks pattern
saaramahmoudi b704e47
Merge branch '6d_router_lookahead' of https://github.com/verilog-to-r…
saaramahmoudi a4f452f
Merge branch 'master' of https://github.com/verilog-to-routing/vtr-ve…
saaramahmoudi 58631f6
refactor switch blocks sides
saaramahmoudi 5e2d636
update functions comments to be doxygen and remove duplicated comments
saaramahmoudi 5a0b6d7
refactoring custom switchblocks functions
saaramahmoudi b275f1f
renaming the switch block 2D and 3D side variables
saaramahmoudi 31e75dd
commented custom 3d switchblocks structs
saaramahmoudi a68257a
changed the function argument from pass by value to pass by ref const
saaramahmoudi 626824d
commented rrgraph functions and extra nodes for 3D custom switchblocks
saaramahmoudi bf4f1c2
comment 3d custom switch block rrgraph-related functions
saaramahmoudi f7e6620
make format
saaramahmoudi 56c9fd5
minor debug: total 3d array length and coords_out_of_bounds was incor…
saaramahmoudi 59f5bd5
revert back index_into_correct_chan to return a single chanx/chany fo…
saaramahmoudi cf52ff2
modified index_into_correct_chan to use chanx/chany based on src side…
saaramahmoudi 3208266
Merge branch 'master' of https://github.com/verilog-to-routing/vtr-ve…
saaramahmoudi 8fb915d
Merge branch 'debug_6d_router_lookahead' of https://github.com/verilo…
saaramahmoudi e7f0629
added a new 3D architecture file with only inter-die connections in SBs
saaramahmoudi c78fc92
removed extra pinlocations tag within the 3D SB arch file
saaramahmoudi f274fbc
make format
saaramahmoudi c46aec0
removed duplicated code by making a helper function
saaramahmoudi 18b2c5c
fixed switch id between 3D SB edges
saaramahmoudi 0ac347b
make format
saaramahmoudi 5326869
Merge branch 'master' into 3d_track_to_track_conn
saaramahmoudi c31ea65
vpr: set bounding box to net bounding box for high fanout nets
amin1377 c83fb79
Merge branch '3d_track_to_track_conn' of https://github.com/verilog-t…
amin1377 87f57cf
Merge branch 'master' into 3d_track_to_track_conn
saaramahmoudi 630d731
return length 0 for extra chanx nodes
saaramahmoudi 256ce68
assign delayless switch to extra rr edges created for 3D custom SBs
saaramahmoudi 4684ed5
Merge branch 'master' into 3d_track_to_track_conn
saaramahmoudi d32c95b
vpr: placement experiment: remove src block for per-layer bounding box
amin1377 898d6f5
vpr: placer experiment: time delay profiler
amin1377 e4c9c96
vpr: placer experiment: turn on router debugger in delay profiling
amin1377 562f8cf
vpr: placer experiment: make the placer delay lookahead a 4D array
amin1377 41ae52c
vpr: placer experiment: update capnp proto with the new format
amin1377 54f28ce
vpr: placer experiment: update place lookahead dump with the new format
amin1377 68d4316
vpr: placer profiler: fix the index of sampling locations
amin1377 44fb542
vpr: placer profiler: fix the debugger sink node
amin1377 2e62d56
vpr: placer profiler: fix the loop boundries of sampling matrix
amin1377 fe072b8
vpr: placer lookup: add layer num to warning message
amin1377 886c55a
Merge branch 'simple_place_delay_model' of https://github.com/verilog…
amin1377 cf09b6a
Merge branch 'simple_place_delay_model' of https://github.com/verilog…
amin1377 7233203
Merge branch 'simple_place_delay_model' of https://github.com/verilog…
amin1377 071b529
Merge branch 'simple_place_delay_model' of https://github.com/verilog…
amin1377 760b5a0
vpr: place: add chanz_place_cost_fac which will be used by net_cost f…
amin1377 bcc7ca5
vpr: place: use chanz cost to cube bounding box cost
amin1377 1c10e7d
vpr: place: initialize chanz_place_cost_fac
amin1377 36ceeca
vpr: place: pass num_sink_per_layer to get_net_cost
amin1377 445e6d0
vpr: place: update layer min/max when cube bounding box is used
amin1377 240ae79
Merge branch 'bounding_box_3d_height' of https://github.com/verilog-t…
amin1377 d439ff8
vpr: place: base chanz_place_cost_fac on the average number of inter-…
amin1377 70c0645
Merge branch 'bounding_box_3d_height' of https://github.com/verilog-t…
amin1377 f46a775
Merge branch 'master' of https://github.com/verilog-to-routing/vtr-ve…
saaramahmoudi a3a3599
only resize the 3D SB matrix if it is being used
saaramahmoudi 1309a04
Merge branch 'master' into 3d_track_to_track_conn
saaramahmoudi 6ede692
added support for fan-out for intermediate nodes in 3D custom switchb…
saaramahmoudi 006675f
removed dead code and added the command line option to control 3D cus…
saaramahmoudi 620fd73
[vpr][router] print layer num of to block
amin1377 a38913c
Merge branch 'master' of https://github.com/verilog-to-routing/vtr-ve…
amin1377 792c276
[git] add .cache to git ignore
amin1377 377aed4
[log] fix printing location for 3d loc
amin1377 832d967
[vpr][route] print net num in log msg
amin1377 8a7a330
[test][strong] add strong 3d graph
amin1377 a909cf2
Merge branch 'master' of https://github.com/verilog-to-routing/vtr-ve…
amin1377 174bb0f
[vpr][route] fix seg fault when router debug is enabled
amin1377 1cebe67
Merge branch 'master' of https://github.com/verilog-to-routing/vtr-ve…
amin1377 c078262
[vpr][route] add all route tree nodes if no node from the target laye…
amin1377 b681f8d
[vpr][base] fix the bug with format coordinate (3d)
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Original file line number | Diff line number | Diff line change |
---|---|---|
|
@@ -126,6 +126,7 @@ static void get_switchblocks_edges(RRGraphBuilder& rr_graph_builder, | |
const int to_y, | ||
const t_rr_type to_chan_type, | ||
const int switch_override, | ||
const int custom_3d_sb_fanin_fanout, | ||
const int delayless_switch, | ||
t_sb_connection_map* sb_conn_map, | ||
vtr::NdMatrix<int, 2>& num_of_3d_conns_custom_SB, | ||
|
@@ -163,6 +164,7 @@ static int get_track_to_chan_seg(RRGraphBuilder& rr_graph_builder, | |
const e_side from_side, | ||
const e_side to_side, | ||
const int swtich_override, | ||
const int custom_3d_sb_fanin_fanout, | ||
const int delayless_switch, | ||
t_sb_connection_map* sb_conn_map, | ||
vtr::NdMatrix<int, 2>& num_of_3d_conns_custom_SB, | ||
|
@@ -1245,6 +1247,7 @@ static bool check_3d_SB_RRnodes(RRGraphBuilder& rr_graph_builder, int x, int y, | |
} | ||
|
||
vtr::NdMatrix<int, 2> get_number_track_to_track_inter_die_conn(t_sb_connection_map* sb_conn_map, | ||
const int custom_3d_sb_fanin_fanout, | ||
RRGraphBuilder& rr_graph_builder) { | ||
auto& grid_ctx = g_vpr_ctx.device().grid; | ||
vtr::NdMatrix<int, 2> extra_nodes_per_switchblocks; | ||
|
@@ -1283,7 +1286,7 @@ vtr::NdMatrix<int, 2> get_number_track_to_track_inter_die_conn(t_sb_connection_m | |
} | ||
} | ||
} | ||
extra_nodes_per_switchblocks[x][y] += ((num_of_3d_conn + 39)/ 40); | ||
extra_nodes_per_switchblocks[x][y] += ((num_of_3d_conn + custom_3d_sb_fanin_fanout - 1)/ custom_3d_sb_fanin_fanout); | ||
} | ||
} | ||
} | ||
|
@@ -1924,6 +1927,7 @@ int get_track_to_tracks(RRGraphBuilder& rr_graph_builder, | |
const t_chan_seg_details* to_seg_details, | ||
const t_chan_details& to_chan_details, | ||
const enum e_directionality directionality, | ||
const int custom_3d_sb_fanin_fanout, | ||
const int delayless_switch, | ||
const vtr::NdMatrix<std::vector<int>, 3>& switch_block_conn, | ||
t_sb_connection_map* sb_conn_map) { | ||
|
@@ -2056,7 +2060,7 @@ int get_track_to_tracks(RRGraphBuilder& rr_graph_builder, | |
if (Direction::DEC == from_seg_details[from_track].direction() || BI_DIRECTIONAL == directionality) { | ||
num_conn += get_track_to_chan_seg(rr_graph_builder, layer, max_chan_width, from_track, to_chan, to_seg, | ||
to_type, from_side_a, to_side, | ||
switch_override, delayless_switch, | ||
switch_override, custom_3d_sb_fanin_fanout, delayless_switch, | ||
sb_conn_map, num_of_3d_conns_custom_SB, from_rr_node, rr_edges_to_create, des_3d_rr_edges_to_create); | ||
} | ||
} else { | ||
|
@@ -2094,7 +2098,7 @@ int get_track_to_tracks(RRGraphBuilder& rr_graph_builder, | |
if (Direction::INC == from_seg_details[from_track].direction() || BI_DIRECTIONAL == directionality) { | ||
num_conn += get_track_to_chan_seg(rr_graph_builder, layer, max_chan_width, from_track, to_chan, to_seg, | ||
to_type, from_side_b, to_side, | ||
switch_override,delayless_switch, | ||
switch_override,custom_3d_sb_fanin_fanout, delayless_switch, | ||
sb_conn_map, num_of_3d_conns_custom_SB, from_rr_node, rr_edges_to_create, des_3d_rr_edges_to_create); | ||
} | ||
} else { | ||
|
@@ -2240,6 +2244,7 @@ static void get_switchblocks_edges(RRGraphBuilder& rr_graph_builder, | |
const int to_y, | ||
const t_rr_type to_chan_type, | ||
const int switch_override, | ||
const int custom_3d_sb_fanin_fanout, | ||
const int delayless_switch, | ||
t_sb_connection_map* sb_conn_map, | ||
vtr::NdMatrix<int, 2>& num_of_3d_conns_custom_SB, | ||
|
@@ -2309,7 +2314,7 @@ static void get_switchblocks_edges(RRGraphBuilder& rr_graph_builder, | |
* +-------------+ +-------------+ +--------------+ +--------------+ | ||
* | ||
* */ | ||
int offset = num_of_3d_conns_custom_SB[tile_x][tile_y] / 40; | ||
int offset = num_of_3d_conns_custom_SB[tile_x][tile_y] / custom_3d_sb_fanin_fanout; | ||
RRNodeId track_to_chanx_node = rr_graph_builder.node_lookup().find_node(layer, tile_x, tile_y, CHANX, max_chan_width + offset); | ||
RRNodeId diff_layer_chanx_node = rr_graph_builder.node_lookup().find_node(to_layer, tile_x, tile_y, CHANX, max_chan_width + offset); | ||
RRNodeId chanx_to_track_node = rr_graph_builder.node_lookup().find_node(to_layer, to_x, to_y, to_chan_type, to_wire); | ||
|
@@ -2333,7 +2338,7 @@ static void get_switchblocks_edges(RRGraphBuilder& rr_graph_builder, | |
++edge_count; | ||
|
||
//we only add the following edge between intermediate nodes once for the first 3D connection for each pair of intermediate nodes | ||
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Is there a big comment somewhere saying how custom_3d_sb_fanin_fanout works? It should detail exactly what the rr graph this generates looks like. |
||
if (num_of_3d_conns_custom_SB[tile_x][tile_y] % 40 == 0) { | ||
if (num_of_3d_conns_custom_SB[tile_x][tile_y] % custom_3d_sb_fanin_fanout == 0) { | ||
rr_edges_to_create.emplace_back(track_to_chanx_node, diff_layer_chanx_node, delayless_switch, false); | ||
++edge_count; | ||
} | ||
|
@@ -2354,6 +2359,7 @@ static int get_track_to_chan_seg(RRGraphBuilder& rr_graph_builder, | |
const e_side from_side, | ||
const e_side to_side, | ||
const int switch_override, | ||
const int custom_3d_sb_fanin_fanout, | ||
const int delayless_switch, | ||
t_sb_connection_map* sb_conn_map, | ||
vtr::NdMatrix<int, 2>& num_of_3d_conns_custom_SB, | ||
|
@@ -2393,6 +2399,7 @@ static int get_track_to_chan_seg(RRGraphBuilder& rr_graph_builder, | |
to_y, | ||
to_chan_type, | ||
switch_override, | ||
custom_3d_sb_fanin_fanout, | ||
delayless_switch, | ||
sb_conn_map, | ||
num_of_3d_conns_custom_SB, | ||
|
@@ -2415,6 +2422,7 @@ static int get_track_to_chan_seg(RRGraphBuilder& rr_graph_builder, | |
to_y, | ||
to_chan_type, | ||
switch_override, | ||
custom_3d_sb_fanin_fanout, | ||
delayless_switch, | ||
sb_conn_map, | ||
num_of_3d_conns_custom_SB, | ||
|
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This seems like it would fit better in the arch file (as a new parameter) than as a command line parameter. What do you think?
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I also think that it might be better to put it in the architecture file, but for now I just keep it as it is to make the testing easier with command line option. When the branch is final, I will talk to you about the architecture change.