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Add explicit ports #358
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Add explicit ports #358
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this commit also: - add helpfull errors on missing packages - add facility to only run subset of task - fix the overrides of config files, must specify that we want to override - add method to forcefully disable coloring in case we can't pick up that its a CI
Previous changes would avoid absorbing buffers driving two primary outputs. We now absorb buffers in that case.
Less conservative buffer absorption improves delay on strong_multiclock test, as an additional buffer is absorbed.
Previously would crash. Now works and draws blocks the color of the physical tile currently implementing them. Note that internal hierarchy drawing still needs work.
Previously only the first block type's internals were drawn.
Previously this was incorrectly skipped. Also fixes range on GUI selector.
This avoids significantly bloating the auto-sized device if a logical block type (e.g. LAB) can be implemented at multiple sites (e.g. LAB or MLAB).
…tions Initial placement now tries all equivalent tile locations before giving up when placing macros.
The drawing code now directly looks-up the default block color based on the placement state. This avoids having to synchronize it manually and fixes a crash when graphics is turned off.
New format includes enough context to parse as a single line
Signed-off-by: Keith Rothman <[email protected]>
Signed-off-by: Alessandro Comodi <[email protected]>
This implements part one of verilog-to-routing#1063 Signed-off-by: Keith Rothman <[email protected]>
This reverts commit 502be5a.
This reverts commit 5007035.
The heap approximation doesn't precisely follow the heap property, but offers an approximation that is sufficent for the router's purpose. This new data structure is faster to clear, faster during route time, and results in better router behavior because it provides some randomness on elements with costs within ~1%. Signed-off-by: Keith Rothman <[email protected]>
Signed-off-by: Alessandro Comodi <[email protected]>
Signed-off-by: Keith Rothman <[email protected]>
Signed-off-by: Keith Rothman <[email protected]>
Signed-off-by: Keith Rothman <[email protected]>
Signed-off-by: Andrew Butt <[email protected]>
This helps avoid conflicts with other changes. Signed-off-by: Keith Rothman <[email protected]>
This avoids width * height A* runs, and is likely much faster and will return better results than the previous place delay matrix algorithm for larger graphs. Signed-off-by: Keith Rothman <[email protected]>
Signed-off-by: Keith Rothman <[email protected]> Updated README.md Signed-off-by: Alessandro Comodi <[email protected]>
Signed-off-by: Keith Rothman <[email protected]>
- Use is_empty_type over direct comparisions. Signed-off-by: Keith Rothman <[email protected]>
Signed-off-by: Keith Rothman <[email protected]>
Signed-off-by: Keith Rothman <[email protected]>
…ip/avoid-criticality-issue', 'wip/avoid_unordered_set', 'wip/disable-check-route-option', 'wip/faster_rr_graph_read', 'wip/inline_main_loop', 'wip/length_bounded', 'wip/lookahead_sampling2', 'wip/place-constraints', 'wip/refactor_heap2', 'wip/revert_clock_propigation', 'wip/rr-graph-binary-read-write', 'wip/symbiflow-badger' and 'wip/use_expansion_for_place_delay' into add_explicit_ports
This is an Octopus Merge commit of the following branches: wip/add-issue-template wip/add_explicit_ports wip/avoid-criticality-issue wip/avoid_unordered_set wip/disable-check-route-option wip/faster_rr_graph_read wip/inline_main_loop wip/length_bounded wip/lookahead_sampling2 wip/place-constraints wip/refactor_heap2 wip/revert_clock_propigation wip/rr-graph-binary-read-write wip/symbiflow-badger wip/use_expansion_for_place_delay Signed-off-by: Keith Rothman <[email protected]>
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I'm expecting the VTR strong tests to fail because of QoR. I'll update this PR with a QoR update once I've isolated the failing QoR's. |
Huh, strong tests passed QoR. Okay, ready for review! |
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Also updates to latest upstream VPR.
See: #357 for the changes from the new wip branch only