Code

Clock modeling 2#405

Code

Merged

mustafabbas merged 115 commits intomasterverilog-to-routing/vtr-verilog-to-routing:masterfrom

clock_modeling_2verilog-to-routing/vtr-verilog-to-routing:clock_modeling_2Copy head branch name to clipboard

Mar 8, 2019

Commits

Commits on Oct 16, 2018

• Added the VPR option for modeling clocks to the router options

  Show description for 0410e62
  mustafabbas

  committed
  0410e62

  Copy full SHA for 0410e62

• Connected clock pins to general routing depending on VPR option

  Show description for b586169
  mustafabbas

  committed
  b586169

  Copy full SHA for b586169

• Passed parameter to route clocks in the timing driven router

  Show description for b0d4c64
  mustafabbas

  committed
  b0d4c64

  Copy full SHA for b0d4c64

• Matched the router and timing analyzer net delay for global nets

  Show description for e55dee6
  mustafabbas

  committed
  e55dee6

  Copy full SHA for e55dee6

• Reverted commits that routed the clock using general routing

  Show description for a6c0fd6
  mustafabbas

  committed
  a6c0fd6

  Copy full SHA for a6c0fd6

• Added an option to route clock nets through a dedicated clock network

  mustafabbas

  committed
  cc7a27c

  Copy full SHA for cc7a27c

• Added clock_modeling_method to router options

  Show description for 36bb832
  mustafabbas

  committed
  36bb832

  Copy full SHA for 36bb832

• Added a StrongId for t_rr_node

  mustafabbas

  committed
  5558d20

  Copy full SHA for 5558d20

• Fix: rename change that caused a merge conflict

  Show description for 9c8ab0d
  mustafabbas

  committed
  9c8ab0d

  Copy full SHA for 9c8ab0d

• Passed clock modeling router option to rr_graph generation code

  Show description for 34dc89a
  mustafabbas

  committed
  34dc89a

  Copy full SHA for 34dc89a

• Simple Star clock model (code resused from other parts in the code base)

  Show description for 992ab30
  mustafabbas

  committed
  992ab30

  Copy full SHA for 992ab30

• skeleton of clock network generation code

  mustafabbas

  committed
  de4c718

  Copy full SHA for de4c718

• Added Spine and Rib wires rr_node generation code

  Show description for 5105760
  mustafabbas

  committed
  5105760

  Copy full SHA for 5105760

• Added drive point node and started clock switch generation

  mustafabbas

  committed
  cc25946

  Copy full SHA for cc25946

• Moved clock network base class and its children to a sperate file

  mustafabbas

  committed
  49c7747

  Copy full SHA for 49c7747

• Added Switchs into reverse lookup

  mustafabbas

  committed
  96f67e7

  Copy full SHA for 96f67e7

• Added skelton of clock edge creation

  mustafabbas

  committed
  10f5a43

  Copy full SHA for 10f5a43

• Added clock network switches

  Show description for 217d366
  mustafabbas

  committed
  217d366

  Copy full SHA for 217d366

• Added missing information in clock rr nodes

  Show description for c9c4bd9
  mustafabbas

  committed
  c9c4bd9

  Copy full SHA for c9c4bd9

• Allowed clock to be routable (still needs fixing)

  mustafabbas

  committed
  11f15af

  Copy full SHA for 11f15af

• Added boundry checks for clock wires and adjusted ptc num calculation

  Show description for 1fb4c90
  mustafabbas

  committed
  1fb4c90

  Copy full SHA for 1fb4c90

• Added support to draw edges for zero length wires in an unconventional way

  mustafabbas

  committed
  ab1e441

  Copy full SHA for ab1e441

• Better way to get ptc num for clock

  Show description for d5eb144
  mustafabbas

  committed
  d5eb144

  Copy full SHA for d5eb144

• Revert "Allowed clock to be routable (still needs fixing)"

  Show description for b17afb7
  mustafabbas

  committed
  b17afb7

  Copy full SHA for b17afb7

• Safer way to acess is_global pin array in treat_clock_pins_as_non_globals

  Show description for cf66303
  mustafabbas

  committed
  cf66303

  Copy full SHA for cf66303

• Made clock nets routable with dedicated clock network

  Show description for d6ff779
  mustafabbas

  committed
  d6ff779

  Copy full SHA for d6ff779

• used a safer function to set ptc_num

  mustafabbas

  committed
  1636472

  Copy full SHA for 1636472

• Code cleanup for clock to pin create_switches()

  mustafabbas

  committed
  22a1610

  Copy full SHA for 22a1610

• Changed rr_indexed_data from array to vector

  mustafabbas

  committed
  3ed093b

  Copy full SHA for 3ed093b

• Fixed mistake when selecting when to treat clock pins as global

  mustafabbas

  committed
  037a937

  Copy full SHA for 037a937

• Added missing direction attribute value to clock rr_nodes

  mustafabbas

  committed
  43b7425

  Copy full SHA for 43b7425

• Adjusted drawing leave enough space for channel width

  mustafabbas

  committed
  75d85ca

  Copy full SHA for 75d85ca

• refractored alloc_and_load_rr_index_data to make it easier to use for clocks

  mustafabbas

  committed
  a30b19f

  Copy full SHA for a30b19f

• Added assert and modified load rr index data function to be more flexible

  mustafabbas

  committed
  dd99cb7

  Copy full SHA for dd99cb7

• Changed segment_inf array to vector

  mustafabbas

  committed
  77e086c

  Copy full SHA for 77e086c

• modified load rr index data function to be more flexible

  mustafabbas

  committed
  01bc66e

  Copy full SHA for 01bc66e

• Ensure that ortho_cost_index does not go out of bounds

  mustafabbas

  committed
  2349795

  Copy full SHA for 2349795

• removed nun_seg and used segment_inf.size() instead

  mustafabbas

  committed
  b98c56b

  Copy full SHA for b98c56b

• Revert "Added suppport to draw edges for zero lenght wires"

  Show description for 59ac675
  mustafabbas

  committed
  59ac675

  Copy full SHA for 59ac675

• Added seg_index class variable to rr_node and set it in rr_graph.cpp

  Show description for b3d1425
  mustafabbas

  committed
  b3d1425

  Copy full SHA for b3d1425

• Fixed routing issue for clocks by reseting the seed per function call

  mustafabbas

  committed
  df35875

  Copy full SHA for df35875

• Parsed clock network into intermediate data types

  mustafabbas

  committed
  634d24d

  Copy full SHA for 634d24d

• minor comment fixes

  mustafabbas

  committed
  ec8dab7

  Copy full SHA for ec8dab7

• moved data from arch to new clock networks vector in vpr context

  mustafabbas

  committed
  fefac09

  Copy full SHA for fefac09

• Added parsing for clock connections

  mustafabbas

  committed
  3235405

  Copy full SHA for 3235405

• Addjusted boundry conditions for clock creation

  mustafabbas

  committed
  1855561

  Copy full SHA for 1855561

• Made rr_switch_inf into a vector

  mustafabbas

  committed
  7c0448d

  Copy full SHA for 7c0448d

• Moved call to create clock nodes into create_rr_graph

  mustafabbas

  committed
  cab6036

  Copy full SHA for cab6036

• Added clock switches to rr_switches

  mustafabbas

  committed
  3bbc2b3

  Copy full SHA for 3bbc2b3

• Added function to set the cost index based on the seg index

  Show description for ec50220
  mustafabbas

  committed
  ec50220

  Copy full SHA for ec50220

• Added clock segments

  mustafabbas

  committed
  6721fc2

  Copy full SHA for 6721fc2

• Reverted modifications made to rr_graph_indexed_data

  mustafabbas

  committed
  2e3bc39

  Copy full SHA for 2e3bc39

• Changed pointer types in segment_inf to vector types

  mustafabbas

  committed
  8e2ef4e

  Copy full SHA for 8e2ef4e

• Changed char* to string in t_segment_inf

  Show description for ecdca5e
  mustafabbas

  committed
  ecdca5e

  Copy full SHA for ecdca5e

• Added a check to skip connecting clock pins to clock networks if a block doesn't exist

  mustafabbas

  committed
  7d9aed1

  Copy full SHA for 7d9aed1

• Added basic clock arrchitecture example

  mustafabbas

  committed
  29d7ae0

  Copy full SHA for 29d7ae0

Commits on Oct 17, 2018

• Eddited the drive buffer to be sized according to the regular routing switch

  Show description for e40a0be
  mustafabbas

  committed
  e40a0be

  Copy full SHA for e40a0be

• Renamed is_global_pin flag to is_ignored_pin

  Show description for fde6a79
  mustafabbas

  committed
  fde6a79

  Copy full SHA for fde6a79

• Renamed is_global_net to is_ignored_net

  Show description for d2d6024
  mustafabbas

  committed
  d2d6024

  Copy full SHA for d2d6024

• Removed unused create_start_model function in rr_graph_clock

  mustafabbas

  committed
  b3ff343

  Copy full SHA for b3ff343

• Added a is_pin_global flag and used it to mark nets as global

  mustafabbas

  committed
  d1655d3

  Copy full SHA for d1655d3

• Ignore high fanout bounding box if routing a global net

  Show description for 1cc850d
  mustafabbas

  committed
  1cc850d

  Copy full SHA for 1cc850d

Commits on Oct 18, 2018

• Added missing c_str_conversion for printing segments

  mustafabbas

  committed
  ea44e95

  Copy full SHA for ea44e95

• Added missing c_str conversion for printing metal layers

  mustafabbas

  committed
  c1fe45b

  Copy full SHA for c1fe45b

• Added missing c_str conversion for printing clock errors

  mustafabbas

  committed
  f938a50

  Copy full SHA for f938a50

• Added missing c_str conversion for printing segments rr_graph.cpp

  mustafabbas

  committed
  c23cf60

  Copy full SHA for c23cf60

Commits on Nov 26, 2018

• vpr: Avoid access to invalid segment

  kmurray

  committed
  51743c0

  Copy full SHA for 51743c0

Commits on Dec 26, 2018

• vtr_flow/arch: Added a second clock instance to the rib and spine clock arch

  mustafabbas

  committed
  3e95697

  Copy full SHA for 3e95697

• vtr_flow: Added a clock arch with a rib and spine clock network where the clock pins can also connect to local routing

  mustafabbas

  committed
  9d660bd

  Copy full SHA for 9d660bd

Commits on Dec 29, 2018

• Fixed warning about unsigned vs signed comparison

  mustafabbas

  committed
  605cc5a

  Copy full SHA for 605cc5a

Commits on Dec 30, 2018

• merge branch master

  mustafabbas

  committed
  1a6d5ff

  Copy full SHA for 1a6d5ff

• Merge branch 'master' into clock_modeling_2

  Show description for 17dbb03
  mustafabbas

  committed
  17dbb03

  Copy full SHA for 17dbb03

Commits on Jan 11, 2019

• Clock Modeling:commenting on how the ptc num is requested and updated

  mustafabbas

  committed
  da830a1

  Copy full SHA for da830a1

• Clock Modeling: Renamed ClockRRGraph class to ClockRRGraphBuilder

  mustafabbas

  committed
  2788ef1

  Copy full SHA for 2788ef1

• Clock Modeling: Adding comments to clock_name_to_switch_points map helper functions in ClockRRGraphBuilder

  mustafabbas

  committed
  0af6e69

  Copy full SHA for 0af6e69

• Clock Modeling: Adding comments to SwitchPoint classes used to store information on switch locations and the rr_node indices they use

  mustafabbas

  committed
  fd19ade

  Copy full SHA for fd19ade

• Clock Modeling: Renamed switch_name to switchpoint_name to be consistent with the arch file

  mustafabbas

  committed
  ae598ae

  Copy full SHA for ae598ae

• Clock Modeling: Adding comments for how to use SwitchPoint class

  mustafabbas

  committed
  69d6e5d

  Copy full SHA for 69d6e5d

• Clock Modeling: Clarifing boundry conditions

  mustafabbas

  committed
  17ca1c3

  Copy full SHA for 17ca1c3

• Clock Modeling: Fixing comment on wire creating above and below the drive point

  mustafabbas

  committed
  31b4324

  Copy full SHA for 31b4324

• Clock Modeling: Adding a comment to explain why tap locations are recorded when generating clock wires

  mustafabbas

  committed
  46646e1

  Copy full SHA for 46646e1

• Clock Modeling: Renamed function for creating clock wires to clearly represent its full functionality

  mustafabbas

  committed
  d81fa06

  Copy full SHA for d81fa06

• Clock Modeling: Adding disclaimer to set_cost_index for which the actual value is set later

  mustafabbas

  committed
  ebc701d

  Copy full SHA for ebc701d

• Clock Modeling: Inserting a comment relating to unused segment_inf data

  mustafabbas

  committed
  b9994cd

  Copy full SHA for b9994cd

• Clock Modeling: Adding a highlevel comment to ClockRRGraphBuilder building functions

  mustafabbas

  committed
  0fe65b1

  Copy full SHA for 0fe65b1

• Clock Modeling: Removing unused function get_connection_type

  mustafabbas

  committed
  a901810

  Copy full SHA for a901810

• Clock Modeling: Removed commented out code

  mustafabbas

  committed
  0fb8448

  Copy full SHA for 0fb8448

Commits on Jan 24, 2019

• Clock Modeling: renamed switch_name to switch_point_name

  mustafabbas

  committed
  efbd439

  Copy full SHA for efbd439

• Clock Modeling: Renamed switch_index to rr_switch_index

  mustafabbas

  committed
  71844b5

  Copy full SHA for 71844b5

• Clock Modeling: Created a variable to describe the number of inter block routing wires connecting to the clock network

  mustafabbas

  committed
  247e951

  Copy full SHA for 247e951

Commits on Jan 25, 2019

• Clock Modeling: Removed functions in RoutingToClockConnection class and called them directly instead

  mustafabbas

  committed
  3b23176

  Copy full SHA for 3b23176

• Clock Modeling: Renamed indices to rr_node_indices

  mustafabbas

  committed
  869b7ca

  Copy full SHA for 869b7ca

• Clock Modeling: Adding comments to explain how clock to clock connections are created

  mustafabbas

  committed
  61aa34a

  Copy full SHA for 61aa34a

• Clock Modeling: Added comment describing the limitaions of the ClockToPinsConnection class

  mustafabbas

  committed
  816485d

  Copy full SHA for 816485d

• Clock Modeling: Better naming in ClockToPinConnection class

  mustafabbas

  committed
  786075f

  Copy full SHA for 786075f

• Clock Modeling: Commenting function in ClockRRGraphBuilder

  mustafabbas

  committed
  26c94a6

  Copy full SHA for 26c94a6

• Clock Modeling: Added comment to clarify add_rr_switches_and_map_to_nodes function behavior

  mustafabbas

  committed
  72a2f38

  Copy full SHA for 72a2f38

Commits on Feb 15, 2019

• Merge branch 'master' into clock_modeling_2

  Show description for fc0922b
  mustafabbas

  committed
  fc0922b

  Copy full SHA for fc0922b

• Clock Modeling: Renamed switch to switchPoints

  mustafabbas

  committed
  6e38548

  Copy full SHA for 6e38548

• Clock Modeling: Renamed clockConnection to clockRouting

  mustafabbas

  committed
  1c6deeb

  Copy full SHA for 1c6deeb

• Clock Modeling: Changed dynamic casts to make_unique and move

  mustafabbas

  committed
  df78a62

  Copy full SHA for df78a62

• Clock Modeling: Replaced repeated split function with the one in vtr_utils

  mustafabbas

  committed
  7bf127f

  Copy full SHA for 7bf127f

• Clock Modeling: Capitalized special values 'clock' and 'routing' in clock arch description

  mustafabbas

  committed
  0a170ad

  Copy full SHA for 0a170ad

• Clock Modeling: Added comment to clarify what setup_clock_network_wires does

  mustafabbas

  committed
  bb1041e

  Copy full SHA for bb1041e

Commits on Feb 18, 2019

• Clock Modeling: Renamed buffer to switch_name in the clock arch description

  mustafabbas

  committed
  4915283

  Copy full SHA for 4915283

Commits on Feb 19, 2019

• Clock Modeling: Renamed file clock_{network|connection}_types files to clock_{network|connection}_builders

  mustafabbas

  committed
  c58e5e8

  Copy full SHA for c58e5e8

• Clock Modeling: Added expect_only_children() and expect_only_attributes() to ensure we reject invalid/unrecognized tags or attributes

  mustafabbas

  committed
  7e5c49c

  Copy full SHA for 7e5c49c

Commits on Feb 25, 2019

• Clock Modeling: Grouping clock related data types

  mustafabbas

  committed
  754656c

  Copy full SHA for 754656c

• Merge branch 'master' into clock_modeling_2

  Show description for a16d529
  mustafabbas

  committed
  a16d529

  Copy full SHA for a16d529

• Clock Modeling: Made repeatx and repeaty optional for clock networks arch

  mustafabbas

  committed
  5c0bde0

  Copy full SHA for 5c0bde0

• Clock Modeling: Refactored load_rr_switch_inf for code reuse

  mustafabbas

  committed
  a31813c

  Copy full SHA for a31813c

Commits on Mar 8, 2019

• Clock Modeling: Removing seg index from rr_nodes

  mustafabbas

  committed
  e7ea3e1

  Copy full SHA for e7ea3e1

• Merge branch 'master' into clock_modeling_2

  Show description for 7425a53
  mustafabbas

  committed
  7425a53

  Copy full SHA for 7425a53

• Renaming is_global_net to net_is_global

  mustafabbas

  committed
  2794983

  Copy full SHA for 2794983

• Clock Modeling: Adding Regression test for dedicated clock

  mustafabbas

  committed
  4a5867c

  Copy full SHA for 4a5867c