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Pass actual fc instead of fc_max to connect to pins #2661

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Oct 8, 2024
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7951434
Merge branch 'master' of https://github.com/verilog-to-routing/vtr-ve…
saaramahmoudi Jun 26, 2024
97b1be6
Merge branch 'fc_log' of https://github.com/verilog-to-routing/vtr-ve…
saaramahmoudi Jun 27, 2024
ccdb004
pass actual Fc through connection blocks functions to use pin-specifi…
saaramahmoudi Jun 27, 2024
d500dd6
Merge branch 'master' of https://github.com/verilog-to-routing/vtr-ve…
saaramahmoudi Jul 5, 2024
ceae381
Merge branch 'master' of https://github.com/verilog-to-routing/vtr-ve…
saaramahmoudi Jul 16, 2024
b1788cb
update load_perturbed_connection_block_pattern
saaramahmoudi Jul 22, 2024
c749a59
Merge branch 'master' of https://github.com/verilog-to-routing/vtr-ve…
saaramahmoudi Jul 22, 2024
2c38e77
Merge branch 'master' of https://github.com/verilog-to-routing/vtr-ve…
saaramahmoudi Jul 23, 2024
e06b192
removed extra log print
saaramahmoudi Jul 23, 2024
38dd40f
Merge branch 'master' into pass_actual_fc_to_connect_to_pins
saaramahmoudi Jul 25, 2024
3ed789e
Merge branch 'master' into pass_actual_fc_to_connect_to_pins
saaramahmoudi Jul 25, 2024
b017a26
Merge branch 'master' into pass_actual_fc_to_connect_to_pins
saaramahmoudi Aug 26, 2024
674623e
document some functions in rr_graph.cpp
saaramahmoudi Aug 26, 2024
757bc61
Merge branch 'master' into pass_actual_fc_to_connect_to_pins
saaramahmoudi Aug 27, 2024
f011e4b
updated golden results
saaramahmoudi Aug 29, 2024
592c0ab
Merge branch 'master' into pass_actual_fc_to_connect_to_pins
saaramahmoudi Aug 29, 2024
85fd2d0
update odin strong test
saaramahmoudi Aug 29, 2024
9b23a7e
Merge branch 'pass_actual_fc_to_connect_to_pins' of https://github.co…
saaramahmoudi Aug 29, 2024
54b9a2b
resolved conflicts with master branch
saaramahmoudi Oct 7, 2024
962d757
Merge branch 'master' into pass_actual_fc_to_connect_to_pins
saaramahmoudi Oct 7, 2024
3ea63b6
code refactoring, applied VB comment suggestions
saaramahmoudi Oct 7, 2024
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73 changes: 63 additions & 10 deletions vpr/src/route/rr_graph.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -94,8 +94,25 @@ std::set<int> get_layers_pin_is_connected_to(const t_physical_tile_type_ptr type
///@brief given a specific layer number and type, it returns layers which have same pin_index connected to the given layer
std::set<int> get_layers_connected_to_pin(const t_physical_tile_type_ptr type, int to_layer, int pin_index);

///@brief checks whether the channel width has been changed or not
bool channel_widths_unchanged(const t_chan_width& current, const t_chan_width& proposed);

/**
* @brief This routine calculate pin connections to tracks for a specific type on the Fc value defined for each pin in the architecture file.
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What is the difference between this routine and the one below it? From their comments they both seem to do the same thing. One returns a 5D matrix of vectors, and the other a 6D matrix, but other than that they don't seem different. Could one be deleted (don't worry about it if that is too much work, but we could put a TODO in if that's the better long term path).

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The one that returns the 6D matrix is written as a helper function for the other one. Basically, we first calculate the number of connections should be made for each pin for the current tile and save a relative track indices. Then, we return the 6D matrix and post process it to calculate the absolute track number and keep a vector of connection per each pin. Note that basically they return the same thing (6D matrix of int and 5D matrix of integer vector) but the logic within each function are different.

* For each type, it will loop through all segments and calculate how many connections should be made, returns the connections for all pins of that type.
*
* @param pin_type Specifies whether the routine should connect tracks to *INPUT* pins or connect *OUTPUT* pins to tracks.
* @param Fc Actual Fc value described in the architecture file for all pins of the specific phyiscal type ([0..number_of_pins-1][0..number_of_segments-1]).
* @param Type Physical type information, such as total number of pins, block width, block height, and etc.
* @param type_layer Layer indicies on which the physical type located.
* @param perturb_switch_pattern Specifies whether connections should be distributed unevenly across the channel or not.
* @param directionality Segment directionality, should be either *UNI-DIRECTIONAL* or *BI-DIRECTIONAL*
* @param seg_inf Segments informations, such as length, frequency, and etc.
* @param sets_per_seg_type Number of available sets within the channel_width of each segment type
*
* @return an 5D matrix which keeps the track indicies connected to each pin ([0..num_pins-1][0..width-1][0..height-1][0..layer-1][0..sides-1]).
*
*/
static vtr::NdMatrix<std::vector<int>, 5> alloc_and_load_pin_to_track_map(const e_pin_type pin_type,
const vtr::Matrix<int>& Fc,
const t_physical_tile_type_ptr Type,
Expand All @@ -104,7 +121,24 @@ static vtr::NdMatrix<std::vector<int>, 5> alloc_and_load_pin_to_track_map(const
const e_directionality directionality,
const std::vector<t_segment_inf>& seg_inf,
const int* sets_per_seg_type);

/**
* @brief This routine calculate pin connections to tracks for a specific type and a specific segment based on the Fc value
* defined for each pin in the architecture file. This routine is called twice for each combination of block type and segment
* type: 1) connecting tracks to input pins 2) connecting output pins to tracks.
*
* @param pin_type Specifies whether the routine should connect tracks to *INPUT* pins or connect *OUTPUT* pins to tracks.
* @param Fc Actual Fc value described in the architecture file for all pins of the specific phyiscal type ([0..number_of_pins-1][0..number_of_segments-1]).
* @param seg_type_tracks Number of tracks that is avaliable for the specific segment.
* @param seg_index The segment index that the function is trying to connect to pins.
* @param max_Fc Used to allocate max possible space for simplicity.
* @param Type Physical type information, such as total number of pins, block width, block height, and etc.
* @param type_layer Layer indicies on which the physical type located.
* @param perturb_switch_pattern Specifies whether connections should be distributed unevenly across the channel or not.
* @param directionality Segment directionality, should be either *UNI-DIRECTIONAL* or *BI-DIRECTIONAL*
*
* @return an 6D matrix which keeps the track indicies connected to each pin ([0..num_pins-1][0..width-1][0..height-1][0..layer-1][0..sides-1][0..Fc-1]).
*
*/
static vtr::NdMatrix<int, 6> alloc_and_load_pin_to_seg_type(const e_pin_type pin_type,
const vtr::Matrix<int>& Fc,
const int seg_type_tracks,
Expand Down Expand Up @@ -297,6 +331,20 @@ static void alloc_and_load_tile_rr_graph(RRGraphBuilder& rr_graph_builder,
const int delayless_switch);

static float pattern_fmod(float a, float b);


/**
* @brief Loads the tracks_connected_to_pin array with an even distribution of switches across the tracks for each pin.
*
* @param tracks_connected_to_pin The funtion loads up this data structure with a track index for each pin ([0..num_pins-1][0..width-1][0..height-1][0..layer-1][0..sides-1][0..Fc-1]]).
* @param pin_locations Physical pin informations, such as pin_index in the physical type, side, and etc.
* @param Fc Actual Fc value described in the architecture file for all pins of the specific phyiscal type ([0..number_of_pins-1][0..number_of_segments-1]).
* @param seg_index The segment index that the function is trying to connect to pins.
* @param x_chan_width Number of tracks in x-axis.
* @param y_chan_width Number of tracks in y-axis.
* @param directionality Segment directionality, should be either *UNI-DIRECTIONAL* or *BI-DIRECTIONAL*
*
*/
static void load_uniform_connection_block_pattern(vtr::NdMatrix<int, 6>& tracks_connected_to_pin,
const std::vector<t_pin_loc>& pin_locations,
const vtr::Matrix<int>& Fc,
Expand All @@ -305,6 +353,18 @@ static void load_uniform_connection_block_pattern(vtr::NdMatrix<int, 6>& tracks_
const int y_chan_width,
const enum e_directionality directionality);

/**
* @brief Loads the tracks_connected_to_pin array with an unevenly distributed set of switches across the channel.
*
* @param tracks_connected_to_pin The funtion loads up this data structure with a track index for each pin ([0..num_pins-1][0..width-1][0..height-1][0..layer-1][0..sides-1][0..Fc-1]]).
* @param pin_locations Physical pin informations, such as pin_index in the physical type, side, and etc.
* @param x_chan_width Number of tracks in x-axis.
* @param y_chan_width Number of tracks in y-axis.
* @param Fc Actual Fc value described in the architecture file for all pins of the specific phyiscal type ([0..number_of_pins-1][0..number_of_segments-1]).
* @param seg_index The segment index that the function is trying to connect to pins.
* @param directionality Segment directionality, should be either *UNI-DIRECTIONAL* or *BI-DIRECTIONAL*
*
*/
static void load_perturbed_connection_block_pattern(vtr::NdMatrix<int, 6>& tracks_connected_to_pin,
const std::vector<t_pin_loc>& pin_locations,
const int x_chan_width,
Expand Down Expand Up @@ -1276,8 +1336,8 @@ static void build_rr_graph(const t_graph_type graph_type,
/* START IPIN MAP */
/* Create ipin map lookups */

t_pin_to_track_lookup ipin_to_track_map_x(types.size()); /* [0..device_ctx.physical_tile_types.size()-1][0..num_pins-1][0..width][0..height][0..3][0..Fc-1] */
t_pin_to_track_lookup ipin_to_track_map_y(types.size()); /* [0..device_ctx.physical_tile_types.size()-1][0..max_chan_width-1][0..width][0..height][0..3] */
t_pin_to_track_lookup ipin_to_track_map_x(types.size()); /* [0..device_ctx.physical_tile_types.size()-1][0..num_pins-1][0..width-1][0..height-1][0..layers-1][0..sides-1][0..Fc-1] */
t_pin_to_track_lookup ipin_to_track_map_y(types.size()); /* [0..device_ctx.physical_tile_types.size()-1][0..num_pins-1][0..width-1][0..height-1][0..layers-1][0..sides-1][0..Fc-1] */

t_track_to_pin_lookup track_to_pin_lookup_x(types.size());
t_track_to_pin_lookup track_to_pin_lookup_y(types.size());
Expand Down Expand Up @@ -3339,13 +3399,6 @@ static vtr::NdMatrix<int, 6> alloc_and_load_pin_to_seg_type(const e_pin_type pin
* If pin ipin on side iside does not exist or is of the wrong type,
* tracks_connected_to_pin[ipin][iside][0] = OPEN. */

/* AA: I think we're currently not doing anything with the ability to specify different Fc values
* for each segment. Cause we're passing in max_Fc into this function by finding the max_Fc for that
* segment type by going through Fc[ipin][iseg] (this is a matrix for each type btw, not the overall
* Fc[itype][ipin][iseg] matrix). Probably should update this to allow finer control over cb along with
* allowing different specification of the segment parallel_axis.
*/

auto& grid = g_vpr_ctx.device().grid;

if (Type->num_pins < 1) {
Expand Down
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