New primitive hard block support titan flow #1876
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Looks mostly good; I have some suggestions for commenting improvements and typo fixes and a few coding cleanups to consider. If the coding cleanups are going to turn into a lot of work or you don't agree with them let me know (just reply to the conversation). If you agree, good to resolve the comment once you make a change.
| /* | ||
| * The purpose of this file is to support netlists that | ||
| * contain new types of hard blocks. Specifically, user defined | ||
| * hard blocks are indetified within the netlist and then instantiated |
| std::string - the name of the Quartus generated netlist file (".vqm") | ||
| * | ||
| */ | ||
| void add_hard_blocks_to_netlist(t_module*, t_arch*, std::vector<std::string>*, std::string, std::string); |
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Give each of these input parameters names in the function prototype, as it improves readability. E.g.:
t_module* netlist, t_arch* fpga_arch, std::vectorstd::string* hb_names, std::string arch_file, std::string vqm_file) -
If you're just passing things by reference, using std::vectorstd::string& is more clear (and easier to read in the .cpp function body). If you don't change the object passed by reference (you're just passing a pointer to a big object for speed) then use a const reference, e.g.
const std::vectorstd::string&
…s, not specific hard block instance names
…ound in the vqm file
…ality to parse nodes that represent hard block ports in vqm netlist
… them to existing module node array. ALso added functionality to quikly find newly created hard block instances (their node in the module and additional info)
… functionality to assign nets to newly created hard block instance ports.
…lock output ports. Also fixed some naming conventions (hard block model -> hard block type)
…e port has multiple nets connected to it. Also, now the number of assigned ports for each hard block instance is properly tracked.
…ock instance port, we identify the port connected to the net, this way we can also extract wire index information when assigning net to the hard block instance port. Also updated some definitions.
…ted hards block instances
… they would correctly indicate that the port was not a bus
… repersent hard blocks ports can be removed from the module now
…ard block in the netlist has a net assigned to it
…new primitive hard block support feature
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…rd_blcoks to insert_custom_hard_blocks
…re and also added parameter names to function prototypes
…erated vqm file. Now the program includes a device option that automatically loads the parameters for a given device.
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@vaughnbetz I resolved most of the changes you had, but there were a few changes that I commented on. Let me know your thoughts on them. |
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Looks good Srivatsan. This can be merged once CI goes green.
I added a couple of minor comment notes / typo that wasn't fixed, but those can be changed after the initial merge.
Also, you can reply to comments in a code review by typing in the "reply" box; that way the conversation will show up with your responses under your name (so it's a bit more clear than editing my notes).
| * within the list. The ports and their indexing is stored. | ||
| * | ||
| * @param main_arch This contains all the information regarding the FPGA | ||
| * architeture that the design will be mapped to. |
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I still think architecture is misspelt (architeture -> architecture)
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There's one spurious QoR failure: But that isn't a major concern (min chan width route time bounces around) and it isn't related to your change. Merging. |
Added support to process designs that contain new types of hard blocks.
Description
When new primitive hard blocks are included in a design, the Quartus synthesis tool does not correctly include the hard blocks
within the generated vqm netlists. Instead of directly instantiating the hard block within the netlist (which occurs for BRAM or DSP blocks), LUTs and DFFs have been added in place of the ports of each hard block within the design.
The feature added in this PR goes through netlists that contain hard blocks and remove the unnecessary LUTs and DFFs and in their place instantiate the corresponding hard block. The resulting blif file correctly includes all the hard blocks.
Related Issue
Motivation and Context
Titan Flow currently does not support new types of hard blocks, so designers would have to manually add the hard blocks to the netlist. This feature automates the previous step and quickly allows designers to perform tests and evaluate architectures with new types of hard blocks.
How Has This Been Tested?
The following tests were performed:
Types of changes
Checklist: