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Copy file name to clipboardExpand all lines: utils/vqm2blif/src/base/hard_block_recog.h
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#ifndef HARD_BLOCK_RECOG_H
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#defineHARD_BLOCK_RECOG_H
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/* VQM new primitive hard block recognition header file
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*
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* The purpose of this file is to identify and instantiate
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*
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* This file also contains all the declarations of functions that can be
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* used to interact with and manipulate the main data structures. Additionally,
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* some utility functions are added to help identify whether a hard block was * included within the design. For more information,
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* refer to 'hard_block_recog.cpp'.
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* some utility functions are added to help identify whether a hard block was
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* included within the design.
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* For more information, refer to 'hard_block_recog.cpp'.
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*
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*/
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// need to use vtr::malloc for memory allocation (only in the files here)
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// no need to run VTR assert, after memory allocation, this is checked in the function already
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// no need to rcheck for failed malloc (NULL pointer), this is already checked in vtr::malloc
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#ifndef HARD_BLOCK_RECOG_H
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#defineHARD_BLOCK_RECOG_H
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// user VTR libraries
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#include"vqm_dll.h"
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// each level of hierarchy (module within module) is seperated by the delimiter character defined below. The last level of hierarchy is the output net of the block
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#defineVQM_NODE_NAME_DELIMITER"|"
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// a port that is a bus is a vectored port. So a single port name with multiple indices.
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// We use the size of the port to determine whether the port is a bus or not.
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// A port size of 1 represents a port that is not a bus, whereas a port size greater than 1 represents a bus.
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// So a non-bus port size is represented below
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#definePORT_NOT_BUS1
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// We use regex to extract the port name and index from the vqm netlist.
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// For example, given the string payload[1]~QIC_DANGLING_PORT_I, we would extract 'payload' and '1'.
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// For the case where a port is not a bus, we would just extract the port name.
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// Now the extracted information is stored in an array of strings, and the indices of where the port name and index are stored is found below.
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#definePORT_NAME1
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#definePORT_INDEX2
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// used to identify the case where a hard block instance is not found within the netlist
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#defineHARD_BLOCK_INSTANCE_DOES_NOT_EXIST -1
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// define how flip flops and LUT will be identified within a given node type (within t_node struct)
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#defineLUT_TYPE"stratixiv_lcell_comb"
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#defineDFF_TYPE"dffeas"
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// define the number of ports a LUT that represents a hard block instance output port would have
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// define the number of output ports a LUT that represents a hard block instance output port would have
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#defineLUT_OUTPUT_PORT_SIZE1
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// names of the output port for a LUT and DFF
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/*
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* The purpose of this data structure is to
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* store the port information (in an array) for an arbritary user defined
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* hard block design. Then a mapping is provided which can
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* The port information (in an array) for an arbritary user defined
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* hard block in the design is stored in s_hard_block_port_info. Then a
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* mapping is provided which can
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* help identify the specific location within the port array
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* that a given port name begins at.
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* that a given port name begins at. This data structure is created
The luts and dffeas used to model ports are all stored as nodes and
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we will need to remove them from the netlist after adding all the
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hard blocks to the netlist.The ports that are modelled by the luts and dffeas aren't needed once all the hard blocks within the design are added to the netlist.The luts and dffeas are simply repeating the port information, so we can remove them.
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hard blocks to the netlist.The ports that are modelled by the luts and dffeas
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aren't needed once all the hard blocks within the design are added to the netlist.
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The luts and dffeas are simply repeating the port information, so we can remove them.
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The nodelist is simply an array. Now deleting lut/dffeas nodes while still creating additional hard block nodes could cause some problems, so we will delete all these nodes at the end. Therefore we need to keep a
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reference for all the luts and dffeas nodes that represent hard block ports here, so we can them remove later on.*/
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The nodelist is simply an array. Now deleting lut/dffeas nodes while still creating additional
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hard block nodes could cause some problems, so we will delete all these nodes at the end.
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Therefore we need to keep a reference for all the luts and dffeas nodes that
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represent hard block ports here, so we can them remove later on.
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*/
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std::vector<t_node*> luts_dffeas_nodes_to_remove; // look into using array index instead
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}t_hard_block_recog;
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/*
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* When we go through the .vqm file, the ports of any user defined hard block * will be represented as a LUT (stratix_lcell), or flip flop (dffeas) (for * more info refer to 'hard_block_recog.cpp'). The generated names found in * the .vqm file for the two previous blocks contain a lot of information * about the hard block. The structure below is used to store the information,
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* which includes the hard block name, hard block type, the specfic hard * block port and if the port is a bus, then the specific index.
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* When we go through the .vqm file, the ports of any user defined hard block
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* will be represented as a LUT (stratix_lcell), or flip flop (dffeas)
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* (for more info refer to 'hard_block_recog.cpp'). The generated names found
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* in the .vqm file for the two previous blocks contain a lot of information
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* about the hard block. The structure below is used to store the information,
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* which includes the hard block name, hard block type, the specfic hard
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* block port and if the port is a bus, then the specific index.
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