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Adding documentation for two stage clock routing cmd line option #1103

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Merged
merged 2 commits into from
Apr 13, 2020

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Updating the documentation to add the two_stage_clock_routing cmd line option

Related Issue

Addresses part of #928 (comment)

Motivation and Context

Adds documentation to an existing command line option

How Has This Been Tested?

N/A

Types of changes

Documentation

Checklist:

  • My change requires a change to the documentation
  • I have updated the documentation accordingly
  • I have added tests to cover my changes
  • All new and existing tests passed

@probot-autolabeler probot-autolabeler bot added docs Documentation VPR VPR FPGA Placement & Routing Tool labels Feb 3, 2020
@mithro
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mithro commented Feb 3, 2020

PTAL - @litghost + @HackerFoo

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@kmurray kmurray left a comment

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I've added some comments below. Otherwise looks good.

Added a disclaimer and changed wording
* First stage: From the net source (e.g. an I/O pin) to a dedicated clock network root (e.g. center of chip)
* Second stage: From the clock network root to net sinks.

Note this option only works when specifying a clock architecture, see :ref:`Clock Architecture Format <clock_architecture_format>`; it does not work when reading a routing resource graph (i.e. :option:`--read_rr_graph`).
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Note dead clock architecture link until #1104 is merged

@kmurray kmurray merged commit ee4ddcf into master Apr 13, 2020
@kmurray kmurray deleted the mustafabbas-clock-cmd-options branch April 13, 2020 15:29
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5 participants