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lines changed Original file line number Diff line number Diff line change
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+ // this example is a representation of the circuit in
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+ // "SAT-Based Verification without State Space Traversal"
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+ // by Per Bjesse & Koen Claessen (FMCAD 2000)
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+ module main (clock, s3, out);
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+ input clock;
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+ input s3;
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+ output out;
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+
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+ wire s5= s4 | s3;
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+ wire s6= ~ s4 |~ s3;
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+ wire s9= ~ s8 |~ s7;
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+ wire s10= s9 |~ s3;
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+ wire s11= (~ s6 | s10)& ( s6 |~ s10);
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+
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+ reg s4;
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+ reg s7;
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+ reg s8;
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+
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+ initial s4= 0 ;
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+ initial s7= 0 ;
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+ initial s8= 0 ;
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+
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+ always @ (posedge clock) s4 <= ~ s5;
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+ always @ (posedge clock) s7 <= ~ s3;
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+ always @ (posedge clock) s8 <= s9;
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+ assign out= s11;
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+ // not inductive for any k
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+ p0 : assert property (s11);
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+ p1 : assert property ((s7 |~ s4) & s11);
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+ // 3-inductive
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+ p2 : assert property ((s8 |~ s4) & s11);
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+ // 2-inductive
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+ p3 : assert property ((~ s8 | ~ s7 | s4) & s11);
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+ p4 : assert property ((s8 |~ s4) & (s7 |~ s4) & s11);
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+ p5 : assert property ((s7 |~ s4) & (~ s8 | ~ s7 | s4) & s11);
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+ p6 : assert property ((s8 |~ s4) & (~ s8 | ~ s7 | s4) & s11);
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+ // inductive
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+ p7 : assert property ((s7 |~ s4) & (s8 |~ s4) & (~ s8 | ~ s7 | s4) & s11);
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+ endmodule
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+ CORE
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+ non_inductive.sv
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+ --ic3 --prop 0
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+ ^property HOLDS$
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+ ^verification is ok
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+ --
Original file line number Diff line number Diff line change @@ -90,20 +90,18 @@ bool ic3_enginet::find_prop(propertyt &Prop)
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std::cout << properties.size () << " properties\n " ;
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exit (100 );
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}
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-
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- for (const auto &p : properties) {
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- std::string Sn;
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- irep_idt Nm = p.name ;
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- short_name (Sn,Nm);
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- int ind = stoi (Sn);
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- if (ind-1 == Ci.prop_ind ) {
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+
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+ size_t idx=0 ;
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+ for (const auto &p : properties)
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+ {
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+ if (idx == Ci.prop_ind )
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+ {
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Prop = p;
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return (true );
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}
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+ idx++;
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}
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-
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- return (false );
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-
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+ return false ;
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} /* end of function find_prop */
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/* ==================================
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