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fix for https://github.com/arduino/ArduinoCore-renesas/issues/12 #31

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maidnl
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@maidnl maidnl commented Jul 4, 2023

fix for #12

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CLAassistant commented Jul 4, 2023

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LGTM 👍

Please cleanup the comments and possible consider replacing ONE_BIT, TWO_BITS with relevant constants from the FSP layer.

@@ -403,16 +426,24 @@ void ArduinoSPI::configSpiSci(arduino::SPISettings const & settings)
uint32_t smr = R_SCI0_SMR_CM_Msk;

/* Configure CPHA setting. */
spmr |= (uint32_t) clk_phase << 7;
uint32_t mask = (ONE_BIT << SCI_CKPH_POS);
spmr &= ~(uint32_t)mask; // reset bit 0
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Is this comment // reset bit 0 true? It looks to me like its copy and paste from the baud rate generator clock divider configuration.


/* Configure CPOL setting. */
spmr |= (uint32_t) clk_polarity << 6;
mask = (ONE_BIT << SCI_CKPOL_POS);
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I'm not really happy with the generic ONE_BIT, TWO__BITS defines. Maybe consider using the FSP layer provided constants, i.e.

-mask = (ONE_BIT << SCI_CKPOL_POS);
+mask = (SPI_CLK_POLARITY_HIGH << SCI_CKPOL_POS);

? This one's a matter of taste though.

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facchinm commented Jul 7, 2023

Superseded by #13

@facchinm facchinm closed this Jul 7, 2023
@trevor-makes
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I think this should be reopened since it fixes additional problems I didn't catch in my PR: clearing the mode and bit order bits so you can revert back if talking to multiple devices, and applies the same fixes to configSpiSci.

@facchinm facchinm reopened this Jul 7, 2023
@@ -374,23 +385,35 @@ void ArduinoSPI::configSpi(arduino::SPISettings const & settings)
uint32_t spcmd0 = _spi_ctrl.p_regs->SPCMD[0];
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I wonder if it would be clearer to just modify the register in-place to make use of Renesas' struct definitions, so all of the masking and bit shifting would be handled implicitly. Like so:

auto& spcmd0 = _spi_ctrl.p_regs->SPCMD_b[0]; // note SPCMD_b not SPCMD
spcmd0.CPHA = clk_phase;
spcmd0.CPOL = clk_polarity;
spcmd0.LSBF = bit_order;
spcmd0.BRDV = spck_div.brdv;

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See definition here

@@ -403,16 +426,24 @@ void ArduinoSPI::configSpiSci(arduino::SPISettings const & settings)
uint32_t smr = R_SCI0_SMR_CM_Msk;
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Likewise, maybe this could be:

auto& spmr = _spi_sci_ctrl.p_reg->SPMR_b;
spmr.CKPH = clk_phase;
spmr.CKPOL = clk_polarity;

auto& scmr = _spi_sci_ctrl.p_reg->SCMR_b;
scmr.SDIR = bit_order;

auto& smr = _spi_sci_ctrl.p_reg->SMR_b;
smr.CKS = clk_div.cks;

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Superseded by #45 .

@aentinger aentinger closed this Jul 24, 2023
pennam pushed a commit to pennam/ArduinoCore-renesas that referenced this pull request Aug 9, 2023
@per1234 per1234 deleted the SPI_mode_and_bit_order_not_set_correctly_fix branch August 12, 2023 14:47
cristidragomir97 pushed a commit to cristidragomir97/ArduinoCore-renesas that referenced this pull request May 20, 2024
Tone: fix infinite duration
Former-commit-id: edbcbd3
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5 participants