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Fix multiple site reader
Signed-off-by: Maciej Dudek <[email protected]>
1 parent 3190567 commit 46d83e0

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+18
-19
lines changed

1 file changed

+18
-19
lines changed

libs/libarchfpga/src/read_fpga_interchange_arch.cpp

Lines changed: 18 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -256,7 +256,7 @@ struct ArchReader {
256256
// Bel Cell mappings
257257
std::unordered_map<uint32_t, std::vector<t_bel_cell_mapping>> bel_cell_mappings_;
258258

259-
std::unordered_map<std::string, int> SegmentName_to_SegmentIdx;
259+
std::unordered_map<std::string, int> segment_name_to_segment_idx;
260260

261261
// Utils
262262
std::string str(int idx) {
@@ -1148,14 +1148,12 @@ struct ArchReader {
11481148
for (auto tile : tileTypeList) {
11491149
t_physical_tile_type ptype;
11501150
auto name = str(tile.getName());
1151-
1152-
if (name == std::string("NULL"))
1151+
if (name == EMPTY.name)
11531152
continue;
1154-
11551153
ptype.name = vtr::strdup(name.c_str());
11561154
ptype.index = ++index;
11571155
ptype.width = ptype.height = ptype.area = 1;
1158-
ptype.capacity = 1;
1156+
ptype.capacity = 0;
11591157

11601158
process_sub_tiles(ptype, tile);
11611159

@@ -1184,17 +1182,18 @@ struct ArchReader {
11841182
auto site = siteTypeList[site_in_tile.getPrimaryType()];
11851183
auto pins_to_wires = site_in_tile.getPrimaryPinsToTileWires();
11861184

1187-
sub_tile.index = 0;
1185+
sub_tile.index = type.capacity;
11881186
sub_tile.name = vtr::strdup(str(site.getName()).c_str());
1189-
sub_tile.capacity.set(0, 0);
1187+
sub_tile.capacity.set(type.capacity, type.capacity);
1188+
type.capacity++;
11901189

11911190
int port_idx = 0;
11921191
int abs_first_pin_idx = 0;
11931192
int icount = 0;
11941193
int ocount = 0;
11951194

1196-
std::unordered_map<std::string, std::string> PortName_to_WireName;
1197-
int idx = 0;
1195+
std::unordered_map<std::string, std::string> port_name_to_wire_name;
1196+
int idx = 0;
11981197
for (auto dir : {LogicalNetlist::Netlist::Direction::INPUT, LogicalNetlist::Netlist::Direction::OUTPUT}) {
11991198
int port_idx_by_type = 0;
12001199
for (auto pin : site.getPins()) {
@@ -1205,12 +1204,12 @@ struct ArchReader {
12051204

12061205
port.name = vtr::strdup(str(pin.getName()).c_str());
12071206

1208-
PortName_to_WireName[std::string(port.name)] = str(pins_to_wires[idx++]);
1207+
port_name_to_wire_name[std::string(port.name)] = str(pins_to_wires[idx++]);
12091208

12101209
port.equivalent = PortEquivalence::NONE;
12111210
port.num_pins = 1;
12121211

1213-
sub_tile.sub_tile_to_tile_pin_indices.push_back(port_idx);
1212+
sub_tile.sub_tile_to_tile_pin_indices.push_back(type.num_pins + port_idx);
12141213
port.index = port_idx++;
12151214

12161215
port.absolute_first_pin_index = abs_first_pin_idx++;
@@ -1232,14 +1231,14 @@ struct ArchReader {
12321231
}
12331232

12341233
auto pins_size = site.getPins().size();
1235-
sub_tile.num_phy_pins += pins_size * type.capacity;
1236-
type.num_pins += pins_size * type.capacity;
1234+
sub_tile.num_phy_pins += pins_size;
1235+
type.num_pins += pins_size;
12371236
type.num_inst_pins += pins_size;
12381237

12391238
type.num_input_pins += icount;
12401239
type.num_output_pins += ocount;
1241-
type.num_receivers += icount * type.capacity;
1242-
type.num_drivers += ocount * type.capacity;
1240+
type.num_receivers += icount;
1241+
type.num_drivers += ocount;
12431242

12441243
type.pin_width_offset.resize(type.num_pins, 0);
12451244
type.pin_height_offset.resize(type.num_pins, 0);
@@ -1272,7 +1271,7 @@ struct ArchReader {
12721271
for (const auto& port : sub_tile.ports) {
12731272
t_fc_specification fc_spec;
12741273

1275-
fc_spec.seg_index = SegmentName_to_SegmentIdx[PortName_to_WireName[std::string(port.name)]];
1274+
fc_spec.seg_index = segment_name_to_segment_idx[port_name_to_wire_name[std::string(port.name)]];
12761275

12771276
//Apply type and defaults
12781277
if (port.type == IN_PORT) {
@@ -1355,8 +1354,8 @@ struct ArchReader {
13551354
t_grid_def grid_def;
13561355
grid_def.width = grid_def.height = 0;
13571356
for (auto tile : tileList) {
1358-
grid_def.width = std::max(grid_def.width, tile.getCol() + 1);
1359-
grid_def.height = std::max(grid_def.height, tile.getRow() + 1);
1357+
grid_def.width = std::max(grid_def.width, tile.getCol());
1358+
grid_def.height = std::max(grid_def.height, tile.getRow());
13601359
}
13611360

13621361
grid_def.grid_type = GridDefType::FIXED;
@@ -1566,7 +1565,7 @@ struct ArchReader {
15661565
arch_->Segments[index].sb.resize(2);
15671566
arch_->Segments[index].sb[0] = true;
15681567
arch_->Segments[index].sb[1] = true;
1569-
SegmentName_to_SegmentIdx[str(i)] = index;
1568+
segment_name_to_segment_idx[str(i)] = index;
15701569
++index;
15711570
}
15721571
}

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