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Fixes to vpr/src/route/rr_graph.cpp
Enable per pin Fc Signed-off-by: Maciej Dudek <[email protected]>
1 parent 8fe6948 commit 0b84717

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2 files changed

+11
-19
lines changed

2 files changed

+11
-19
lines changed

libs/libarchfpga/src/read_fpga_interchange_arch.cpp

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -226,7 +226,6 @@ struct ArchReader {
226226

227227
SyncModelsPbTypes(arch_, ltypes_);
228228
check_models(arch_);
229-
230229
}
231230

232231
private:

vpr/src/route/rr_graph.cpp

Lines changed: 11 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -86,6 +86,7 @@ static vtr::NdMatrix<std::vector<int>, 4> alloc_and_load_pin_to_track_map(const
8686
static vtr::NdMatrix<int, 5> alloc_and_load_pin_to_seg_type(const e_pin_type pin_type,
8787
const int seg_type_tracks,
8888
const int Fc,
89+
const std::vector<int> seg_type_Fc,
8990
const t_physical_tile_type_ptr Type,
9091
const bool perturb_switch_pattern,
9192
const e_directionality directionality);
@@ -1696,21 +1697,6 @@ static vtr::NdMatrix<std::vector<int>, 4> alloc_and_load_pin_to_track_map(const
16961697
const e_directionality directionality,
16971698
const int num_seg_types,
16981699
const int* sets_per_seg_type) {
1699-
/* get the maximum number of tracks that any pin can connect to */
1700-
size_t max_pin_tracks = 0;
1701-
for (int iseg = 0; iseg < num_seg_types; iseg++) {
1702-
/* determine the maximum Fc to this segment type across all pins */
1703-
int max_Fc = 0;
1704-
for (int pin_index = 0; pin_index < Type->num_pins; ++pin_index) {
1705-
int pin_class = Type->pin_class[pin_index];
1706-
if (Fc[pin_index][iseg] > max_Fc && Type->class_inf[pin_class].type == pin_type) {
1707-
max_Fc = Fc[pin_index][iseg];
1708-
}
1709-
}
1710-
1711-
max_pin_tracks += max_Fc;
1712-
}
1713-
17141700
/* allocate 'result' matrix and initialize entries to OPEN. also allocate and intialize matrix which will be
17151701
* used to index into the correct entries when loading up 'result' */
17161702

@@ -1733,17 +1719,21 @@ static vtr::NdMatrix<std::vector<int>, 4> alloc_and_load_pin_to_track_map(const
17331719
int num_seg_type_tracks = fac * sets_per_seg_type[iseg];
17341720

17351721
/* determine the maximum Fc to this segment type across all pins */
1722+
std::vector<int> seg_type_Fc;
17361723
int max_Fc = 0;
17371724
for (int pin_index = 0; pin_index < Type->num_pins; ++pin_index) {
17381725
int pin_class = Type->pin_class[pin_index];
1726+
1727+
seg_type_Fc.push_back(Fc[pin_index][iseg]); // Create Fc values for pins
1728+
17391729
if (Fc[pin_index][iseg] > max_Fc && Type->class_inf[pin_class].type == pin_type) {
17401730
max_Fc = Fc[pin_index][iseg];
17411731
}
17421732
}
17431733

17441734
/* get pin connections to tracks of the current segment type */
17451735
auto pin_to_seg_type_map = alloc_and_load_pin_to_seg_type(pin_type,
1746-
num_seg_type_tracks, max_Fc, Type, perturb_switch_pattern[iseg], directionality);
1736+
num_seg_type_tracks, max_Fc, seg_type_Fc, Type, perturb_switch_pattern[iseg], directionality);
17471737

17481738
/* connections in pin_to_seg_type_map are within that seg type -- i.e. in the [0,num_seg_type_tracks-1] range.
17491739
* now load up 'result' array with these connections, but offset them so they are relative to the channel
@@ -1770,20 +1760,23 @@ static vtr::NdMatrix<std::vector<int>, 4> alloc_and_load_pin_to_track_map(const
17701760
/* next seg type will start at this track index */
17711761
seg_type_start_track += num_seg_type_tracks;
17721762
}
1773-
17741763
return result;
17751764
}
17761765

17771766
static vtr::NdMatrix<int, 5> alloc_and_load_pin_to_seg_type(const e_pin_type pin_type,
17781767
const int num_seg_type_tracks,
17791768
const int Fc,
1769+
const std::vector<int> seg_type_Fc,
17801770
const t_physical_tile_type_ptr Type,
17811771
const bool perturb_switch_pattern,
17821772
const e_directionality directionality) {
17831773
/* Note: currently a single value of Fc is used across each pin. In the future
17841774
* the looping below will have to be modified if we want to account for pin-based
17851775
* Fc values */
17861776

1777+
/* Note: Added support for pin-based Fc values
1778+
*/
1779+
17871780
/* NB: This wastes some space. Could set tracks_..._pin[ipin][ioff][iside] =
17881781
* NULL if there is no pin on that side, or that pin is of the wrong type.
17891782
* Probably not enough memory to worry about, esp. as it's temporary.
@@ -1848,7 +1841,7 @@ static vtr::NdMatrix<int, 5> alloc_and_load_pin_to_seg_type(const e_pin_type pin
18481841
for (int width = 0; width < Type->width; ++width) {
18491842
for (int height = 0; height < Type->height; ++height) {
18501843
for (e_side side : SIDES) {
1851-
if (Type->pinloc[width][height][side][pin] == 1) {
1844+
if (Type->pinloc[width][height][side][pin] == 1 && seg_type_Fc[pin] > 0) {
18521845
dir_list[width][height][side][num_dir[width][height][side]] = pin;
18531846
num_dir[width][height][side]++;
18541847
}

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