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Fix multiple site reader
Signed-off-by: Maciej Dudek <[email protected]>
1 parent b0d82a8 commit 8fe6948

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+18
-19
lines changed

1 file changed

+18
-19
lines changed

libs/libarchfpga/src/read_fpga_interchange_arch.cpp

Lines changed: 18 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -246,7 +246,7 @@ struct ArchReader {
246246
// Bel Cell mappings
247247
std::unordered_map<uint32_t, std::vector<t_bel_cell_mapping>> bel_cell_mappings_;
248248

249-
std::unordered_map<std::string, int> SegmentName_to_SegmentIdx;
249+
std::unordered_map<std::string, int> segment_name_to_segment_idx;
250250

251251
// Utils
252252
std::string str(int idx) {
@@ -1138,14 +1138,12 @@ struct ArchReader {
11381138
for (auto tile : tileTypeList) {
11391139
t_physical_tile_type ptype;
11401140
auto name = str(tile.getName());
1141-
1142-
if (name == std::string("NULL"))
1141+
if (name == EMPTY.name)
11431142
continue;
1144-
11451143
ptype.name = vtr::strdup(name.c_str());
11461144
ptype.index = ++index;
11471145
ptype.width = ptype.height = ptype.area = 1;
1148-
ptype.capacity = 1;
1146+
ptype.capacity = 0;
11491147

11501148
process_sub_tiles(ptype, tile);
11511149

@@ -1174,17 +1172,18 @@ struct ArchReader {
11741172
auto site = siteTypeList[site_in_tile.getPrimaryType()];
11751173
auto pins_to_wires = site_in_tile.getPrimaryPinsToTileWires();
11761174

1177-
sub_tile.index = 0;
1175+
sub_tile.index = type.capacity;
11781176
sub_tile.name = vtr::strdup(str(site.getName()).c_str());
1179-
sub_tile.capacity.set(0, 0);
1177+
sub_tile.capacity.set(type.capacity, type.capacity);
1178+
type.capacity++;
11801179

11811180
int port_idx = 0;
11821181
int abs_first_pin_idx = 0;
11831182
int icount = 0;
11841183
int ocount = 0;
11851184

1186-
std::unordered_map<std::string, std::string> PortName_to_WireName;
1187-
int idx = 0;
1185+
std::unordered_map<std::string, std::string> port_name_to_wire_name;
1186+
int idx = 0;
11881187
for (auto dir : {LogicalNetlist::Netlist::Direction::INPUT, LogicalNetlist::Netlist::Direction::OUTPUT}) {
11891188
int port_idx_by_type = 0;
11901189
for (auto pin : site.getPins()) {
@@ -1195,12 +1194,12 @@ struct ArchReader {
11951194

11961195
port.name = vtr::strdup(str(pin.getName()).c_str());
11971196

1198-
PortName_to_WireName[std::string(port.name)] = str(pins_to_wires[idx++]);
1197+
port_name_to_wire_name[std::string(port.name)] = str(pins_to_wires[idx++]);
11991198

12001199
port.equivalent = PortEquivalence::NONE;
12011200
port.num_pins = 1;
12021201

1203-
sub_tile.sub_tile_to_tile_pin_indices.push_back(port_idx);
1202+
sub_tile.sub_tile_to_tile_pin_indices.push_back(type.num_pins + port_idx);
12041203
port.index = port_idx++;
12051204

12061205
port.absolute_first_pin_index = abs_first_pin_idx++;
@@ -1222,14 +1221,14 @@ struct ArchReader {
12221221
}
12231222

12241223
auto pins_size = site.getPins().size();
1225-
sub_tile.num_phy_pins += pins_size * type.capacity;
1226-
type.num_pins += pins_size * type.capacity;
1224+
sub_tile.num_phy_pins += pins_size;
1225+
type.num_pins += pins_size;
12271226
type.num_inst_pins += pins_size;
12281227

12291228
type.num_input_pins += icount;
12301229
type.num_output_pins += ocount;
1231-
type.num_receivers += icount * type.capacity;
1232-
type.num_drivers += ocount * type.capacity;
1230+
type.num_receivers += icount;
1231+
type.num_drivers += ocount;
12331232

12341233
type.pin_width_offset.resize(type.num_pins, 0);
12351234
type.pin_height_offset.resize(type.num_pins, 0);
@@ -1262,7 +1261,7 @@ struct ArchReader {
12621261
for (const auto& port : sub_tile.ports) {
12631262
t_fc_specification fc_spec;
12641263

1265-
fc_spec.seg_index = SegmentName_to_SegmentIdx[PortName_to_WireName[std::string(port.name)]];
1264+
fc_spec.seg_index = segment_name_to_segment_idx[port_name_to_wire_name[std::string(port.name)]];
12661265

12671266
//Apply type and defaults
12681267
if (port.type == IN_PORT) {
@@ -1302,8 +1301,8 @@ struct ArchReader {
13021301
t_grid_def grid_def;
13031302
grid_def.width = grid_def.height = 0;
13041303
for (auto tile : tileList) {
1305-
grid_def.width = std::max(grid_def.width, tile.getCol() + 1);
1306-
grid_def.height = std::max(grid_def.height, tile.getRow() + 1);
1304+
grid_def.width = std::max(grid_def.width, tile.getCol());
1305+
grid_def.height = std::max(grid_def.height, tile.getRow());
13071306
}
13081307

13091308
grid_def.grid_type = GridDefType::FIXED;
@@ -1501,7 +1500,7 @@ struct ArchReader {
15011500
arch_->Segments[index].sb.resize(2);
15021501
arch_->Segments[index].sb[0] = true;
15031502
arch_->Segments[index].sb[1] = true;
1504-
SegmentName_to_SegmentIdx[str(i)] = index;
1503+
segment_name_to_segment_idx[str(i)] = index;
15051504
++index;
15061505
}
15071506
}

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