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May 12, 2025
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2 changes: 1 addition & 1 deletion utils/route_diag/src/main.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -292,7 +292,7 @@ int main(int argc, const char **argv) {

alloc_routing_structs(chan_width,
vpr_setup.RouterOpts,
&vpr_setup.RoutingArch,
vpr_setup.RoutingArch,
vpr_setup.Segments,
Arch.directs,
is_flat);
Expand Down
2 changes: 1 addition & 1 deletion vpr/src/analytical_place/detailed_placer.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -65,7 +65,7 @@ AnnealerDetailedPlacer::AnnealerDetailedPlacer(const BlkLocRegistry& curr_cluste
place_delay_model = PlacementDelayModelCreator::create_delay_model(vpr_setup.PlacerOpts,
vpr_setup.RouterOpts,
(const Netlist<>&)clustered_netlist,
&vpr_setup.RoutingArch,
vpr_setup.RoutingArch,
vpr_setup.Segments,
arch.Chans,
arch.directs,
Expand Down
70 changes: 36 additions & 34 deletions vpr/src/base/SetupVPR.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -38,10 +38,12 @@ static void SetupNocOpts(const t_options& Options,
t_noc_opts* NocOpts);
static void SetupServerOpts(const t_options& Options,
t_server_opts* ServerOpts);
static void SetupRoutingArch(const t_arch& Arch, t_det_routing_arch* RoutingArch);

static void SetupRoutingArch(const t_arch& Arch, t_det_routing_arch& RoutingArch);

static void SetupTiming(const t_options& Options, const bool TimingEnabled, t_timing_inf* Timing);
static void SetupSwitches(const t_arch& Arch,
t_det_routing_arch* RoutingArch,
t_det_routing_arch& RoutingArch,
const std::vector<t_arch_switch_inf>& arch_switches);
static void SetupAnalysisOpts(const t_options& Options, t_analysis_opts& analysis_opts);
static void SetupPowerOpts(const t_options& Options, t_power_opts* power_opts, t_arch* Arch);
Expand Down Expand Up @@ -97,7 +99,7 @@ void SetupVPR(const t_options* options,
t_analysis_opts* analysisOpts,
t_noc_opts* nocOpts,
t_server_opts* serverOpts,
t_det_routing_arch* routingArch,
t_det_routing_arch& routingArch,
std::vector<t_lb_type_rr_node>** packerRRGraphs,
std::vector<t_segment_inf>& segments,
t_timing_inf* timing,
Expand Down Expand Up @@ -231,9 +233,9 @@ void SetupVPR(const t_options* options,
SetupTiming(*options, timingenabled, timing);
SetupPackerOpts(*options, packerOpts);
SetupAPOpts(*options, *apOpts);
routingArch->write_rr_graph_filename = options->write_rr_graph_file;
routingArch->read_rr_graph_filename = options->read_rr_graph_file;
routingArch->read_rr_edge_override_filename = options->read_rr_edge_override_file;
routingArch.write_rr_graph_filename = options->write_rr_graph_file;
routingArch.read_rr_graph_filename = options->read_rr_graph_file;
routingArch.read_rr_edge_override_filename = options->read_rr_edge_override_file;

for (auto has_global_routing : arch->layer_global_routing) {
device_ctx.inter_cluster_prog_routing_resources.emplace_back(has_global_routing);
Expand Down Expand Up @@ -355,17 +357,17 @@ static void SetupTiming(const t_options& Options, const bool TimingEnabled, t_ti
* from the arch file with the special switches that VPR needs.
*/
static void SetupSwitches(const t_arch& Arch,
t_det_routing_arch* RoutingArch,
t_det_routing_arch& RoutingArch,
const std::vector<t_arch_switch_inf>& arch_switches) {
auto& device_ctx = g_vpr_ctx.mutable_device();

int switches_to_copy = (int)arch_switches.size();
int num_arch_switches = (int)arch_switches.size();

find_ipin_cblock_switch_index(Arch, RoutingArch->wire_to_arch_ipin_switch, RoutingArch->wire_to_arch_ipin_switch_between_dice);
find_ipin_cblock_switch_index(Arch, RoutingArch.wire_to_arch_ipin_switch, RoutingArch.wire_to_arch_ipin_switch_between_dice);

/* Depends on device_ctx.num_arch_switches */
RoutingArch->delayless_switch = num_arch_switches++;
RoutingArch.delayless_switch = num_arch_switches++;

/* Alloc the list now that we know the final num_arch_switches value */
device_ctx.arch_switch_inf.resize(num_arch_switches);
Expand All @@ -377,32 +379,32 @@ static void SetupSwitches(const t_arch& Arch,
}

/* Delayless switch for connecting sinks and sources with their pins. */
device_ctx.arch_switch_inf[RoutingArch->delayless_switch].set_type(SwitchType::MUX);
device_ctx.arch_switch_inf[RoutingArch->delayless_switch].name = std::string(VPR_DELAYLESS_SWITCH_NAME);
device_ctx.arch_switch_inf[RoutingArch->delayless_switch].R = 0.;
device_ctx.arch_switch_inf[RoutingArch->delayless_switch].Cin = 0.;
device_ctx.arch_switch_inf[RoutingArch->delayless_switch].Cout = 0.;
device_ctx.arch_switch_inf[RoutingArch->delayless_switch].set_Tdel(t_arch_switch_inf::UNDEFINED_FANIN, 0.);
device_ctx.arch_switch_inf[RoutingArch->delayless_switch].power_buffer_type = POWER_BUFFER_TYPE_NONE;
device_ctx.arch_switch_inf[RoutingArch->delayless_switch].mux_trans_size = 0.;
device_ctx.arch_switch_inf[RoutingArch->delayless_switch].buf_size_type = BufferSize::ABSOLUTE;
device_ctx.arch_switch_inf[RoutingArch->delayless_switch].buf_size = 0.;
VTR_ASSERT_MSG(device_ctx.arch_switch_inf[RoutingArch->delayless_switch].buffered(), "Delayless switch expected to be buffered (isolating)");
VTR_ASSERT_MSG(device_ctx.arch_switch_inf[RoutingArch->delayless_switch].configurable(), "Delayless switch expected to be configurable");
device_ctx.arch_switch_inf[RoutingArch.delayless_switch].set_type(SwitchType::MUX);
device_ctx.arch_switch_inf[RoutingArch.delayless_switch].name = std::string(VPR_DELAYLESS_SWITCH_NAME);
device_ctx.arch_switch_inf[RoutingArch.delayless_switch].R = 0.;
device_ctx.arch_switch_inf[RoutingArch.delayless_switch].Cin = 0.;
device_ctx.arch_switch_inf[RoutingArch.delayless_switch].Cout = 0.;
device_ctx.arch_switch_inf[RoutingArch.delayless_switch].set_Tdel(t_arch_switch_inf::UNDEFINED_FANIN, 0.);
device_ctx.arch_switch_inf[RoutingArch.delayless_switch].power_buffer_type = POWER_BUFFER_TYPE_NONE;
device_ctx.arch_switch_inf[RoutingArch.delayless_switch].mux_trans_size = 0.;
device_ctx.arch_switch_inf[RoutingArch.delayless_switch].buf_size_type = BufferSize::ABSOLUTE;
device_ctx.arch_switch_inf[RoutingArch.delayless_switch].buf_size = 0.;
VTR_ASSERT_MSG(device_ctx.arch_switch_inf[RoutingArch.delayless_switch].buffered(), "Delayless switch expected to be buffered (isolating)");
VTR_ASSERT_MSG(device_ctx.arch_switch_inf[RoutingArch.delayless_switch].configurable(), "Delayless switch expected to be configurable");

device_ctx.all_sw_inf[RoutingArch->delayless_switch] = device_ctx.arch_switch_inf[RoutingArch->delayless_switch];
device_ctx.all_sw_inf[RoutingArch.delayless_switch] = device_ctx.arch_switch_inf[RoutingArch.delayless_switch];

RoutingArch->global_route_switch = RoutingArch->delayless_switch;
RoutingArch.global_route_switch = RoutingArch.delayless_switch;

device_ctx.delayless_switch_idx = RoutingArch->delayless_switch;
device_ctx.delayless_switch_idx = RoutingArch.delayless_switch;

//Warn about non-zero Cout values for the ipin switch, since these values have no effect.
//VPR do not model the R/C's of block internal routing connection.
//
//Note that we don't warn about the R value as it may be used to size the buffer (if buf_size_type is AUTO)
if (device_ctx.arch_switch_inf[RoutingArch->wire_to_arch_ipin_switch].Cout != 0.) {
if (device_ctx.arch_switch_inf[RoutingArch.wire_to_arch_ipin_switch].Cout != 0.) {
VTR_LOG_WARN("Non-zero switch output capacitance (%g) has no effect when switch '%s' is used for connection block inputs\n",
device_ctx.arch_switch_inf[RoutingArch->wire_to_arch_ipin_switch].Cout, Arch.ipin_cblock_switch_name[0].c_str());
device_ctx.arch_switch_inf[RoutingArch.wire_to_arch_ipin_switch].Cout, Arch.ipin_cblock_switch_name[0].c_str());
}
}

Expand All @@ -412,18 +414,18 @@ static void SetupSwitches(const t_arch& Arch,
* Since checks are already done, this just copies values across
*/
static void SetupRoutingArch(const t_arch& Arch,
t_det_routing_arch* RoutingArch) {
RoutingArch->switch_block_type = Arch.SBType;
RoutingArch->R_minW_nmos = Arch.R_minW_nmos;
RoutingArch->R_minW_pmos = Arch.R_minW_pmos;
RoutingArch->Fs = Arch.Fs;
RoutingArch->directionality = BI_DIRECTIONAL;
t_det_routing_arch& RoutingArch) {
RoutingArch.switch_block_type = Arch.SBType;
RoutingArch.R_minW_nmos = Arch.R_minW_nmos;
RoutingArch.R_minW_pmos = Arch.R_minW_pmos;
RoutingArch.Fs = Arch.Fs;
RoutingArch.directionality = BI_DIRECTIONAL;
if (!Arch.Segments.empty()) {
RoutingArch->directionality = Arch.Segments[0].directionality;
RoutingArch.directionality = Arch.Segments[0].directionality;
}

/* copy over the switch block information */
RoutingArch->switchblocks = Arch.switchblocks;
RoutingArch.switchblocks = Arch.switchblocks;
}

static void SetupRouterOpts(const t_options& Options, t_router_opts* RouterOpts) {
Expand Down
2 changes: 1 addition & 1 deletion vpr/src/base/SetupVPR.h
Original file line number Diff line number Diff line change
Expand Up @@ -18,7 +18,7 @@ void SetupVPR(const t_options* Options,
t_analysis_opts* AnalysisOpts,
t_noc_opts* NocOpts,
t_server_opts* ServerOpts,
t_det_routing_arch* RoutingArch,
t_det_routing_arch& RoutingArch,
std::vector<t_lb_type_rr_node>** PackerRRGraphs,
std::vector<t_segment_inf>& Segments,
t_timing_inf* Timing,
Expand Down
16 changes: 8 additions & 8 deletions vpr/src/base/place_and_route.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -48,7 +48,7 @@ int binary_search_place_and_route(const Netlist<>& placement_net_list,
const t_arch* arch,
bool verify_binary_search,
int min_chan_width_hint,
t_det_routing_arch* det_routing_arch,
t_det_routing_arch& det_routing_arch,
std::vector<t_segment_inf>& segment_inf,
NetPinsMatrix<float>& net_delay,
const std::shared_ptr<SetupHoldTimingInfo>& timing_info,
Expand Down Expand Up @@ -83,13 +83,13 @@ int binary_search_place_and_route(const Netlist<>& placement_net_list,
graph_type = e_graph_type::GLOBAL;
graph_directionality = e_graph_type::BIDIR;
} else {
graph_type = (det_routing_arch->directionality == BI_DIRECTIONAL ? e_graph_type::BIDIR : e_graph_type::UNIDIR);
graph_directionality = (det_routing_arch->directionality == BI_DIRECTIONAL ? e_graph_type::BIDIR : e_graph_type::UNIDIR);
graph_type = (det_routing_arch.directionality == BI_DIRECTIONAL ? e_graph_type::BIDIR : e_graph_type::UNIDIR);
graph_directionality = (det_routing_arch.directionality == BI_DIRECTIONAL ? e_graph_type::BIDIR : e_graph_type::UNIDIR);
}

VTR_ASSERT(!net_delay.empty());

if (det_routing_arch->directionality == BI_DIRECTIONAL)
if (det_routing_arch.directionality == BI_DIRECTIONAL)
udsd_multiplier = 1;
else
udsd_multiplier = 2;
Expand All @@ -116,14 +116,14 @@ int binary_search_place_and_route(const Netlist<>& placement_net_list,
}

/* Constraints must be checked to not break rr_graph generator */
if (det_routing_arch->directionality == UNI_DIRECTIONAL) {
if (det_routing_arch.directionality == UNI_DIRECTIONAL) {
if (current % 2 != 0) {
VPR_FATAL_ERROR(VPR_ERROR_ROUTE,
"Tried odd chan width (%d) in uni-directional routing architecture (chan width must be even).\n",
current);
}
} else {
if (det_routing_arch->Fs % 3) {
if (det_routing_arch.Fs % 3) {
VPR_FATAL_ERROR(VPR_ERROR_ROUTE,
"Fs must be three in bidirectional mode.\n");
}
Expand Down Expand Up @@ -158,7 +158,7 @@ int binary_search_place_and_route(const Netlist<>& placement_net_list,
}
}

if ((current * 3) < det_routing_arch->Fs) {
if ((current * 3) < det_routing_arch.Fs) {
VTR_LOG("Width factor is now below specified Fs. Stop search.\n");
final = high;
break;
Expand Down Expand Up @@ -350,7 +350,7 @@ int binary_search_place_and_route(const Netlist<>& placement_net_list,
prev2_success = prev_success;
prev_success = success;
current--;
if (det_routing_arch->directionality == UNI_DIRECTIONAL) {
if (det_routing_arch.directionality == UNI_DIRECTIONAL) {
current--; /* width must be even */
}
}
Expand Down
2 changes: 1 addition & 1 deletion vpr/src/base/place_and_route.h
Original file line number Diff line number Diff line change
Expand Up @@ -29,7 +29,7 @@ int binary_search_place_and_route(const Netlist<>& placement_net_list,
const t_arch* arch,
bool verify_binary_search,
int min_chan_width_hint,
t_det_routing_arch* det_routing_arch,
t_det_routing_arch& det_routing_arch,
std::vector<t_segment_inf>& segment_inf,
NetPinsMatrix<float>& net_delay,
const std::shared_ptr<SetupHoldTimingInfo>& timing_info,
Expand Down
23 changes: 11 additions & 12 deletions vpr/src/base/vpr_api.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -293,7 +293,7 @@ void vpr_init_with_options(const t_options* options, t_vpr_setup* vpr_setup, t_a
&vpr_setup->AnalysisOpts,
&vpr_setup->NocOpts,
&vpr_setup->ServerOpts,
&vpr_setup->RoutingArch,
vpr_setup->RoutingArch,
&vpr_setup->PackerRRGraph,
vpr_setup->Segments,
&vpr_setup->Timing,
Expand Down Expand Up @@ -830,7 +830,7 @@ void vpr_place(const Netlist<>& net_list,
vpr_setup.AnalysisOpts,
vpr_setup.NocOpts,
arch.Chans,
&vpr_setup.RoutingArch,
vpr_setup.RoutingArch,
vpr_setup.Segments,
arch.directs,
g_vpr_ctx.atom().flat_placement_info(),
Expand All @@ -848,7 +848,7 @@ void vpr_place(const Netlist<>& net_list,
}

void vpr_load_placement(t_vpr_setup& vpr_setup,
const std::vector<t_direct_inf> directs) {
const std::vector<t_direct_inf>& directs) {
vtr::ScopedStartFinishTimer timer("Load Placement");

const auto& device_ctx = g_vpr_ctx.device();
Expand Down Expand Up @@ -1044,7 +1044,7 @@ RouteStatus vpr_route_fixed_W(const Netlist<>& net_list,
fixed_channel_width,
vpr_setup.RouterOpts,
vpr_setup.AnalysisOpts,
&vpr_setup.RoutingArch,
vpr_setup.RoutingArch,
vpr_setup.Segments,
net_delay,
timing_info,
Expand Down Expand Up @@ -1081,7 +1081,7 @@ RouteStatus vpr_route_min_W(const Netlist<>& net_list,
&arch,
router_opts.verify_binary_search,
router_opts.min_channel_width_hint,
&vpr_setup.RoutingArch,
vpr_setup.RoutingArch,
vpr_setup.Segments,
net_delay,
timing_info,
Expand Down Expand Up @@ -1121,7 +1121,7 @@ RouteStatus vpr_load_routing(t_vpr_setup& vpr_setup,

void vpr_create_rr_graph(t_vpr_setup& vpr_setup, const t_arch& arch, int chan_width_fac, bool is_flat) {
auto& device_ctx = g_vpr_ctx.mutable_device();
auto det_routing_arch = &vpr_setup.RoutingArch;
t_det_routing_arch& det_routing_arch = vpr_setup.RoutingArch;
auto& router_opts = vpr_setup.RouterOpts;

e_graph_type graph_type;
Expand All @@ -1130,8 +1130,8 @@ void vpr_create_rr_graph(t_vpr_setup& vpr_setup, const t_arch& arch, int chan_wi
graph_type = e_graph_type::GLOBAL;
graph_directionality = e_graph_type::BIDIR;
} else {
graph_type = (det_routing_arch->directionality == BI_DIRECTIONAL ? e_graph_type::BIDIR : e_graph_type::UNIDIR);
graph_directionality = (det_routing_arch->directionality == BI_DIRECTIONAL ? e_graph_type::BIDIR : e_graph_type::UNIDIR);
graph_type = (det_routing_arch.directionality == BI_DIRECTIONAL ? e_graph_type::BIDIR : e_graph_type::UNIDIR);
graph_directionality = (det_routing_arch.directionality == BI_DIRECTIONAL ? e_graph_type::BIDIR : e_graph_type::UNIDIR);
}

t_chan_width chan_width = init_chan(chan_width_fac, arch.Chans, graph_directionality);
Expand Down Expand Up @@ -1293,7 +1293,7 @@ void vpr_setup_vpr(t_options* Options,
t_analysis_opts* AnalysisOpts,
t_noc_opts* NocOpts,
t_server_opts* ServerOpts,
t_det_routing_arch* RoutingArch,
t_det_routing_arch& RoutingArch,
std::vector<t_lb_type_rr_node>** PackerRRGraph,
std::vector<t_segment_inf>& Segments,
t_timing_inf* Timing,
Expand Down Expand Up @@ -1518,7 +1518,7 @@ void vpr_power_estimation(const t_vpr_setup& vpr_setup,

/* Initialize the power module */
bool power_error = power_init(vpr_setup.FileNameOpts.PowerFile.c_str(),
vpr_setup.FileNameOpts.CmosTechFile.c_str(), &Arch, &vpr_setup.RoutingArch);
vpr_setup.FileNameOpts.CmosTechFile.c_str(), &Arch, vpr_setup.RoutingArch);
if (power_error) {
VTR_LOG_ERROR("Power initialization failed.\n");
}
Expand All @@ -1529,8 +1529,7 @@ void vpr_power_estimation(const t_vpr_setup& vpr_setup,
VTR_LOG("Running power estimation\n");

/* Run power estimation */
e_power_ret_code power_ret_code = power_total(&power_runtime_s, vpr_setup,
&Arch, &vpr_setup.RoutingArch);
e_power_ret_code power_ret_code = power_total(&power_runtime_s, vpr_setup, &Arch, vpr_setup.RoutingArch);

/* Check for errors/warnings */
if (power_ret_code == POWER_RET_CODE_ERRORS) {
Expand Down
4 changes: 2 additions & 2 deletions vpr/src/base/vpr_api.h
Original file line number Diff line number Diff line change
Expand Up @@ -82,7 +82,7 @@ void vpr_place(const Netlist<>& net_list,

///@brief Loads a previous placement
void vpr_load_placement(t_vpr_setup& vpr_setup,
const std::vector<t_direct_inf> directs);
const std::vector<t_direct_inf>& directs);

/* Routing */

Expand Down Expand Up @@ -186,7 +186,7 @@ void vpr_setup_vpr(t_options* Options,
t_analysis_opts* AnalysisOpts,
t_noc_opts* NocOpts,
t_server_opts* ServerOpts,
t_det_routing_arch* RoutingArch,
t_det_routing_arch& RoutingArch,
std::vector<t_lb_type_rr_node>** PackerRRGraph,
std::vector<t_segment_inf>& Segments,
t_timing_inf* Timing,
Expand Down
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