Placement Refactoring

libs/libarchfpga/src/physical_types.h

@@ -923,10 +923,10 @@ struct t_logical_block_type {
     std::vector<t_physical_tile_type_ptr> equivalent_tiles; ///>List of physical tiles at which one could
                                                             ///>place this type of netlist block.
 
-    std::unordered_map<int, t_pb_graph_pin*> pin_logical_num_to_pb_pin_mapping;                   /* pin_logical_num_to_pb_pin_mapping[pin logical number] -> pb_graph_pin ptr} */
-    std::unordered_map<const t_pb_graph_pin*, int> primitive_pb_pin_to_logical_class_num_mapping; /* primitive_pb_pin_to_logical_class_num_mapping[pb_graph_pin ptr] -> class logical number */
-    std::vector<t_class> primitive_logical_class_inf;                                             /* primitive_logical_class_inf[class_logical_number] -> class */
-    std::unordered_map<const t_pb_graph_node*, t_class_range> pb_graph_node_class_range;
+    std::unordered_map<int, t_pb_graph_pin*> pin_logical_num_to_pb_pin_mapping;                    /* pin_logical_num_to_pb_pin_mapping[pin logical number] -> pb_graph_pin ptr} */
+    std::unordered_map<const t_pb_graph_pin*, int> primitive_pb_pin_to_logical_class_num_mapping;  /* primitive_pb_pin_to_logical_class_num_mapping[pb_graph_pin ptr] -> class logical number */
+    std::vector<t_class> primitive_logical_class_inf;                                              /* primitive_logical_class_inf[class_logical_number] -> class */
+    std::unordered_map<const t_pb_graph_node*, t_class_range> primitive_pb_graph_node_class_range; /* primitive_pb_graph_node_class_range[primitive_pb_graph_node ptr] -> class range for that primitive*/
 
     // Is this t_logical_block_type empty?
     bool is_empty() const;
@@ -1232,6 +1232,12 @@ class t_pb_graph_node {
 
     int placement_index;
 
+    /*
+     * There is a root-level pb_graph_node assigned to each logical type. Each logical type can contain multiple primitives.
+     * If this pb_graph_node is associated with a primitive, a unique number is assigned to it within the logical block level.
+     */
+    int primitive_num = OPEN;
+
     /* Contains a collection of mode indices that cannot be used as they produce conflicts during VPR packing stage
      *
      * Illegal modes do arise when children of a graph_node do have inconsistent `edge_modes` with respect to

libs/libarchfpga/src/physical_types_util.cpp

@@ -524,6 +524,39 @@ bool is_sub_tile_compatible(t_physical_tile_type_ptr physical_tile, t_logical_bl
     return capacity_compatible && is_tile_compatible(physical_tile, logical_block);
 }
 
+bool is_atom_compatible(t_logical_block_type_ptr logical_block, const t_pb_graph_node* atom_pb_graph_node, int loc_primitive_num) {
+    VTR_ASSERT(loc_primitive_num != OPEN);
+    const t_pb_graph_node* loc_pb_graph_node = nullptr;
+
+    // Check whether the atom
+    const t_pb_graph_node* parent_pb_graph_node = atom_pb_graph_node->parent_pb_graph_node;
+    while (parent_pb_graph_node->parent_pb_graph_node != nullptr) {
+        parent_pb_graph_node = parent_pb_graph_node->parent_pb_graph_node;
+    }
+
+    if (logical_block->pb_graph_head != parent_pb_graph_node) {
+        return false;
+    }
+    /**
+     * Iterate over the data structure that maps primitive_pb_graph_node to their respective class range,
+     * and retrieve the primitive_pb_graph_node from that map. If the primitive number assigned to that
+     * primitive_pb_graph_node is equal to loc_primitive_num, then we have found the desired primitive_pb_graph_node.
+     */
+    for (const auto& primitive_node_class_pair : logical_block->primitive_pb_graph_node_class_range) {
+        const auto& primitive_node = primitive_node_class_pair.first;
+        VTR_ASSERT_SAFE(primitive_node->primitive_num != OPEN);
+        if (primitive_node->primitive_num == loc_primitive_num) {
+            loc_pb_graph_node = primitive_node;
+            break;
+        }
+    }
+    VTR_ASSERT_SAFE(loc_pb_graph_node != nullptr);
+    if (loc_pb_graph_node->pb_type == atom_pb_graph_node->pb_type)
+        return true;
+    else
+        return false;
+}
+
 int get_physical_pin_at_sub_tile_location(t_physical_tile_type_ptr physical_tile,
                                           t_logical_block_type_ptr logical_block,
                                           int sub_tile_capacity,
@@ -965,7 +998,7 @@ t_class_range get_pb_graph_node_class_physical_range(t_physical_tile_type_ptr /*
                                                      const t_pb_graph_node* pb_graph_node) {
     VTR_ASSERT(pb_graph_node->is_primitive());
 
-    t_class_range class_range = logical_block->pb_graph_node_class_range.at(pb_graph_node);
+    t_class_range class_range = logical_block->primitive_pb_graph_node_class_range.at(pb_graph_node);
     int logical_block_class_offset = sub_tile->primitive_class_range[sub_tile_relative_cap].at(logical_block).low;
 
     class_range.low += logical_block_class_offset;

libs/libarchfpga/src/physical_types_util.h

@@ -187,6 +187,9 @@ bool is_tile_compatible(t_physical_tile_type_ptr physical_tile, t_logical_block_
 ///@brief Verifies whether a logical block and a relative placement location is compatible with a given physical tile
 bool is_sub_tile_compatible(t_physical_tile_type_ptr physical_tile, t_logical_block_type_ptr logical_block, int sub_tile_loc);
 
+///@brief Verifies whether the given atom_pb_graph_node can be mapped to the primitive that loc_primitive_num is pointing to.
+bool is_atom_compatible(t_logical_block_type_ptr logical_block, const t_pb_graph_node* atom_pb_graph_node, int loc_primitive_num);
+
 /**
  * @brief Returns the first physical tile type that matches the logical block
  *

libs/libvtrutil/src/vtr_vec_id_set.h

@@ -2,6 +2,7 @@
 #define VTR_SET_H
 
 #include <vector>
+#include <algorithm>
 
 namespace vtr {
 

vpr/src/base/SetupVPR.cpp

@@ -679,6 +679,7 @@ static void SetupPlacerOpts(const t_options& Options, t_placer_opts* PlacerOpts)
     PlacerOpts->place_constraint_subtile = Options.place_constraint_subtile;
     PlacerOpts->floorplan_num_horizontal_partitions = Options.floorplan_num_horizontal_partitions;
     PlacerOpts->floorplan_num_vertical_partitions = Options.floorplan_num_vertical_partitions;
+    PlacerOpts->place_re_cluster = Options.place_re_cluster;
 
     PlacerOpts->seed = Options.Seed;
 

vpr/src/base/read_options.cpp

@@ -2176,6 +2176,15 @@ argparse::ArgumentParser create_arg_parser(std::string prog_name, t_options& arg
         .choices({"move_type", "move_block_type"})
         .show_in(argparse::ShowIn::HELP_ONLY);
 
+    place_grp.add_argument<bool, ParseOnOff>(args.place_re_cluster, "--place_re_cluster")
+        .help(
+            "Use this option to determine whether reclustering occurs during placement. "
+            ""
+            "When this option is set to 'on,' the placement stage may change some clusters. "
+            "Conversely, if the option is set to 'off,' the clustering determined by the packer will remain unchanged")
+        .default_value("off")
+        .show_in(argparse::ShowIn::HELP_ONLY);
+
     place_grp.add_argument(args.placer_debug_block, "--placer_debug_block")
         .help(
             " Controls when placer debugging is enabled for blocks.\n"

vpr/src/base/read_options.h

@@ -144,6 +144,7 @@ struct t_options {
     argparse::ArgValue<bool> place_constraint_subtile;
     argparse::ArgValue<int> floorplan_num_horizontal_partitions;
     argparse::ArgValue<int> floorplan_num_vertical_partitions;
+    argparse::ArgValue<bool> place_re_cluster;
 
     argparse::ArgValue<int> placer_debug_block;
     argparse::ArgValue<int> placer_debug_net;

vpr/src/base/vpr_types.cpp

@@ -320,4 +320,31 @@ void t_cluster_placement_stats::free_primitives() {
             delete primitive.second;
         }
     }
+}
+
+/**
+ * @brief Get the atom block id at the given location. Since we currently don't have any array to retrieve this information directly,
+ * we first find the cluster mapped to that location, and then find the atom inside that cluster that is mapped to the given location.
+ */
+AtomBlockId GridBlock::block_at_location(const t_pl_atom_loc& loc) const {
+    const auto& atom_lookup = g_vpr_ctx.atom().lookup;
+    t_pl_loc cluster_loc(loc.x, loc.y, loc.sub_tile, loc.layer);
+    ClusterBlockId cluster_at_loc = block_at_location(cluster_loc);
+    if (cluster_at_loc == EMPTY_BLOCK_ID) {
+        return EMPTY_PRIMITIVE_BLOCK_ID;
+    } else if (cluster_at_loc == INVALID_BLOCK_ID) {
+        return INVALID_PRIMITIVE_BLOCK_ID;
+    } else {
+        VTR_ASSERT(cluster_at_loc.is_valid());
+        const auto& cluster_atoms = g_vpr_ctx.cl_helper().atoms_lookup;
+        const auto& atom_list = cluster_atoms.at(cluster_at_loc);
+        for (const auto& atom : atom_list) {
+            int primitive_pin = atom_lookup.atom_pb_graph_node(atom)->primitive_num;
+            t_pl_atom_loc atom_loc(primitive_pin, cluster_loc.x, cluster_loc.y, cluster_loc.sub_tile, cluster_loc.layer);
+            if (atom_loc == loc) {
+                return atom;
+            }
+        }
+        return EMPTY_PRIMITIVE_BLOCK_ID;
+    }
 }

vpr/src/base/vpr_types.h

@@ -99,7 +99,9 @@ enum class ScreenUpdatePriority {
 
 /* Defining macros for the placement_ctx t_grid_blocks. Assumes that ClusterBlockId's won't exceed positive 32-bit integers */
 constexpr auto EMPTY_BLOCK_ID = ClusterBlockId(-1);
+constexpr auto EMPTY_PRIMITIVE_BLOCK_ID = AtomBlockId(-1);
 constexpr auto INVALID_BLOCK_ID = ClusterBlockId(-2);
+constexpr auto INVALID_PRIMITIVE_BLOCK_ID = AtomBlockId(-2);
 
 /*
  * Files
@@ -774,7 +776,7 @@ struct t_pl_loc {
     }
 
     friend bool operator==(const t_pl_loc& lhs, const t_pl_loc& rhs) {
-        return std::tie(lhs.layer, lhs.x, lhs.y, lhs.sub_tile) == std::tie(rhs.layer, rhs.x, rhs.y, rhs.sub_tile);
+        return std::tie(lhs.x, lhs.y, lhs.sub_tile, lhs.layer) == std::tie(rhs.x, rhs.y, rhs.sub_tile, rhs.layer);
     }
 
     friend bool operator!=(const t_pl_loc& lhs, const t_pl_loc& rhs) {
@@ -795,6 +797,40 @@ struct hash<t_pl_loc> {
 };
 } // namespace std
 
+struct t_pl_atom_loc {
+    t_pl_atom_loc() = default;
+    t_pl_atom_loc(int primitive_id_, int x_, int y_, int sub_tile_, int layer_)
+        : primitive_id(primitive_id_)
+        , x(x_)
+        , y(y_)
+        , sub_tile(sub_tile_)
+        , layer(layer_) {}
+
+    int primitive_id = OPEN;
+    int x = OPEN;
+    int y = OPEN;
+    int sub_tile = OPEN;
+    int layer = OPEN;
+
+    friend bool operator==(const t_pl_atom_loc& lhs, const t_pl_atom_loc& rhs) {
+        return std::tie(lhs.primitive_id, lhs.x, lhs.y, lhs.sub_tile, lhs.layer) == std::tie(rhs.primitive_id, rhs.x, rhs.y, rhs.sub_tile, rhs.layer);
+    }
+};
+
+namespace std {
+template<>
+struct hash<t_pl_atom_loc> {
+    std::size_t operator()(const t_pl_atom_loc& v) const noexcept {
+        std::size_t seed = std::hash<int>{}(v.x);
+        vtr::hash_combine(seed, v.y);
+        vtr::hash_combine(seed, v.sub_tile);
+        vtr::hash_combine(seed, v.layer);
+        vtr::hash_combine(seed, v.primitive_id);
+        return seed;
+    }
+};
+} // namespace std
+
 struct t_place_region {
     float capacity; ///<Capacity of this region, in tracks.
     float inv_capacity;
@@ -859,6 +895,8 @@ class GridBlock {
         return grid_blocks_[loc.layer][loc.x][loc.y].blocks[loc.sub_tile];
     }
 
+    AtomBlockId block_at_location(const t_pl_atom_loc& loc) const;
+
     inline size_t num_blocks_at_location(const t_physical_tile_loc& loc) const {
         return grid_blocks_[loc.layer_num][loc.x][loc.y].blocks.size();
     }
@@ -1255,6 +1293,7 @@ struct t_placer_opts {
     int floorplan_num_horizontal_partitions;
     int floorplan_num_vertical_partitions;
 
+    bool place_re_cluster;
     int placer_debug_block;
     int placer_debug_net;
 
@@ -1887,4 +1926,10 @@ void free_pack_molecules(t_pack_molecule* list_of_pack_molecules);
  */
 void free_cluster_placement_stats(t_cluster_placement_stats* cluster_placement_stats);
 
+struct pair_hash {
+    std::size_t operator()(const std::pair<ClusterBlockId, ClusterBlockId>& p) const noexcept {
+        return std::hash<ClusterBlockId>()(p.first) ^ (std::hash<ClusterBlockId>()(p.second) << 1);
+    }
+};
+
 #endif

vpr/src/pack/pb_type_graph.cpp

@@ -49,7 +49,8 @@ static void alloc_and_load_pb_graph(t_pb_graph_node* pb_graph_node,
                                     t_pb_type* pb_type,
                                     const int index,
                                     bool load_power_structures,
-                                    int& pin_count_in_cluster);
+                                    int& pin_count_in_cluster,
+                                    int& primitive_num);
 
 static void alloc_and_load_pb_graph_pin_sinks(t_pb_graph_node* pb_graph_node);
 
@@ -147,12 +148,14 @@ void alloc_and_load_all_pb_graphs(bool load_power_structures, bool is_flat) {
         if (type.pb_type) {
             type.pb_graph_head = new t_pb_graph_node();
             int pin_count_in_cluster = 0;
+            int primitive_num = 0;
             alloc_and_load_pb_graph(type.pb_graph_head,
                                     nullptr,
                                     type.pb_type,
                                     0,
                                     load_power_structures,
-                                    pin_count_in_cluster);
+                                    pin_count_in_cluster,
+                                    primitive_num);
             type.pb_graph_head->total_pb_pins = pin_count_in_cluster;
             load_pin_classes_in_pb_graph_head(type.pb_graph_head);
             if (is_flat) {
@@ -225,7 +228,8 @@ static void alloc_and_load_pb_graph(t_pb_graph_node* pb_graph_node,
                                     t_pb_type* pb_type,
                                     const int index,
                                     bool load_power_structures,
-                                    int& pin_count_in_cluster) {
+                                    int& pin_count_in_cluster,
+                                    int& primitive_num) {
     int i, j, k, i_input, i_output, i_clockport;
 
     pb_graph_node->placement_index = index;
@@ -236,8 +240,6 @@ static void alloc_and_load_pb_graph(t_pb_graph_node* pb_graph_node,
     pb_graph_node->num_output_ports = 0;
     pb_graph_node->num_clock_ports = 0;
 
-    pb_graph_node->total_primitive_count = 0;
-
     /* Generate ports for pb graph node */
     for (i = 0; i < pb_type->num_ports; i++) {
         if (pb_type->ports[i].type == IN_PORT && !pb_type->ports[i].is_clock) {
@@ -341,6 +343,11 @@ static void alloc_and_load_pb_graph(t_pb_graph_node* pb_graph_node,
         pb_graph_node->pb_node_power->transistor_cnt_pb_children = 0.;
     }
 
+    if (pb_graph_node->is_primitive()) {
+        pb_graph_node->primitive_num = primitive_num;
+        primitive_num++;
+    }
+
     /* Allocate and load child nodes for each mode and create interconnect in each mode */
 
     pb_graph_node->child_pb_graph_nodes = (t_pb_graph_node***)vtr::calloc(pb_type->num_modes, sizeof(t_pb_graph_node**));
@@ -355,7 +362,8 @@ static void alloc_and_load_pb_graph(t_pb_graph_node* pb_graph_node,
                                         &pb_type->modes[i].pb_type_children[j],
                                         k,
                                         load_power_structures,
-                                        pin_count_in_cluster);
+                                        pin_count_in_cluster,
+                                        primitive_num);
             }
         }
     }
@@ -370,17 +378,6 @@ static void alloc_and_load_pb_graph(t_pb_graph_node* pb_graph_node,
                                          &pb_type->modes[i],
                                          load_power_structures);
     }
-
-    // update the total number of primitives of that type
-    if (pb_graph_node->is_primitive()) {
-        int total_count = 1;
-        auto pb_node = pb_graph_node;
-        while (!pb_node->is_root()) {
-            total_count *= pb_node->pb_type->num_pb;
-            pb_node = pb_node->parent_pb_graph_node;
-        }
-        pb_graph_node->total_primitive_count = total_count;
-    }
 }
 
 static void alloc_and_load_pb_graph_pin_sinks(t_pb_graph_node* pb_graph_node) {
@@ -532,8 +529,8 @@ static void add_primitive_logical_classes(t_logical_block_type* logical_block) {
             }
             num_added_classes += add_port_logical_classes(logical_block, pb_graph_pins, num_ports, num_pins);
         }
-        logical_block->pb_graph_node_class_range.insert(std::make_pair(pb_graph_node, t_class_range(first_class_num,
-                                                                                                    first_class_num + num_added_classes - 1)));
+        logical_block->primitive_pb_graph_node_class_range.insert(std::make_pair(pb_graph_node, t_class_range(first_class_num,
+                                                                                                              first_class_num + num_added_classes - 1)));
     }
 }