Move rr_graph_reader & rr_graph_writer to librrgraph.

libs/libarchfpga/src/base_cost_type.h

@@ -0,0 +1,14 @@
+#ifndef BASE_COST_TYPE_H
+#define BASE_COST_TYPE_H
+
+enum e_base_cost_type {
+    DELAY_NORMALIZED,
+    DELAY_NORMALIZED_LENGTH,
+    DELAY_NORMALIZED_FREQUENCY,
+    DELAY_NORMALIZED_LENGTH_FREQUENCY,
+    DELAY_NORMALIZED_LENGTH_BOUNDED,
+    DEMAND_ONLY,
+    DEMAND_ONLY_NORMALIZED_LENGTH
+};
+
+#endif

libs/libarchfpga/src/chan_width.h

@@ -0,0 +1,16 @@
+#ifndef CHAN_WIDTH_H
+#define CHAN_WIDTH_H
+
+#include <vector>
+
+struct t_chan_width {
+    int max = 0;
+    int x_max = 0;
+    int y_max = 0;
+    int x_min = 0;
+    int y_min = 0;
+    std::vector<int> x_list;
+    std::vector<int> y_list;
+};
+
+#endif

libs/libarchfpga/src/cost_indices.h

@@ -0,0 +1,13 @@
+#ifndef COST_INDICES_H
+#define COST_INDICES_H
+
+///@brief Index of the SOURCE, SINK, OPIN, IPIN, etc. member of device_ctx.rr_indexed_data.
+enum e_cost_indices {
+    SOURCE_COST_INDEX = 0,
+    SINK_COST_INDEX,
+    OPIN_COST_INDEX,
+    IPIN_COST_INDEX,
+    CHANX_COST_INDEX_START
+};
+
+#endif

vpr/src/base/device_grid.cpp → libs/libarchfpga/src/device_grid.cpp

@@ -1,5 +1,4 @@
 #include "device_grid.h"
-#include "vpr_utils.h"
 
 DeviceGrid::DeviceGrid(std::string grid_name, vtr::Matrix<t_grid_tile> grid)
     : name_(grid_name)

libs/libarchfpga/src/graph_type.h

@@ -0,0 +1,13 @@
+#ifndef GRAPH_TYPE_H
+#define GRAPH_TYPE_H
+
+enum e_graph_type {
+    GRAPH_GLOBAL, /* One node per channel with wire capacity > 1 and full connectivity */
+    GRAPH_BIDIR,  /* Detailed bidirectional graph */
+    GRAPH_UNIDIR, /* Detailed unidir graph, untilable */
+    /* RESEARCH TODO: Get this option debugged */
+    GRAPH_UNIDIR_TILEABLE /* Detail unidir graph with wire groups multiples of 2*L */
+};
+typedef enum e_graph_type t_graph_type;
+
+#endif

libs/libarchfpga/src/route_type.h

@@ -0,0 +1,9 @@
+#ifndef ROUTE_TYPE_H
+#define ROUTE_TYPE_H
+
+enum e_route_type {
+    GLOBAL,
+    DETAILED
+};
+
+#endif

libs/libarchfpga/src/unified_to_parallel_seg_index.h

@@ -0,0 +1,11 @@
+#ifndef UNIFIED_TO_PARALLEL_SEG_INDEX_H
+#define UNIFIED_TO_PARALLEL_SEG_INDEX_H
+
+#include "physical_types.h"
+
+/* This map is used to get indices w.r.t segment_inf_x or segment_inf_y based on parallel_axis of a segment, 
+ * from indices w.r.t the **unified** segment vector, segment_inf in devices context which stores all segments 
+ * regardless of their axis. (see get_parallel_segs for more details)*/
+typedef std::unordered_multimap<size_t, std::pair<size_t, e_parallel_axis>> t_unified_to_parallel_seg_index;
+
+#endif

libs/librrgraph/CMakeLists.txt

@@ -7,6 +7,10 @@ file(GLOB_RECURSE LIB_SOURCES src/*/*.cpp)
 file(GLOB_RECURSE LIB_HEADERS src/*/*.h)
 files_to_dirs(LIB_HEADERS LIB_INCLUDE_DIRS)
 
+if(${VTR_ENABLE_CAPNPROTO})
+    add_definitions("-DVTR_ENABLE_CAPNPROTO")
+endif()
+
 #Create the library
 add_library(librrgraph STATIC
     ${LIB_HEADERS}
@@ -23,6 +27,10 @@ target_link_libraries(librrgraph
                       libarchfpga
 )
 
+if(${VTR_ENABLE_CAPNPROTO})
+    target_link_libraries(librrgraph libvtrcapnproto)
+endif()
+
 target_compile_definitions(librrgraph PUBLIC ${INTERCHANGE_SCHEMA_HEADERS})
 
 # Unit tests
@@ -33,3 +41,21 @@ target_compile_definitions(librrgraph PUBLIC ${INTERCHANGE_SCHEMA_HEADERS})
 
 # Run unit tests: comment out for now
 #add_test(NAME test_rr_graph COMMAND test_rr_graph --use-colour=yes)
+
+add_custom_target(
+    generate_rr_graph_serializers
+    COMMAND ${CMAKE_COMMAND} -E remove_directory rr_graph_generate
+    COMMAND ${CMAKE_COMMAND} -E make_directory rr_graph_generate
+    COMMAND ${CMAKE_COMMAND} -E chdir rr_graph_generate git clone https://github.com/duck2/uxsdcxx
+    COMMAND python3 -mpip install --user -r rr_graph_generate/uxsdcxx/requirements.txt
+    COMMAND ${CMAKE_COMMAND} -E chdir rr_graph_generate python3 uxsdcxx/uxsdcxx.py ${CMAKE_CURRENT_SOURCE_DIR}/src/base/rr_graph.xsd
+    COMMAND ${CMAKE_COMMAND} -E chdir rr_graph_generate python3 uxsdcxx/uxsdcap.py ${CMAKE_CURRENT_SOURCE_DIR}/src/base/rr_graph.xsd
+    COMMAND ${CMAKE_COMMAND} -E copy
+        rr_graph_generate/rr_graph_uxsdcxx.h
+        rr_graph_generate/rr_graph_uxsdcxx_capnp.h
+        rr_graph_generate/rr_graph_uxsdcxx_interface.h
+        ${CMAKE_CURRENT_SOURCE_DIR}/src/base/gen
+    COMMAND ${CMAKE_COMMAND} -E copy rr_graph_generate/rr_graph_uxsdcxx.capnp ${CMAKE_CURRENT_SOURCE_DIR}/../libvtrcapnproto/gen
+    DEPENDS ${CMAKE_CURRENT_SOURCE_DIR}/src/base/rr_graph.xsd
+    WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}
+    )

vpr/src/route/SCHEMA_GENERATOR.md → libs/librrgraph/src/base/SCHEMA_GENERATOR.md

@@ -6,30 +6,30 @@ mediated via RrGraphBase located in `rr_graph_uxsdcxx_interface.h`.
 
 If `rr_graph.xsd` is modified, then the following files must be updated:
 
- - `vpr/src/route/gen/rr_graph_uxsdcxx.h`
- - `vpr/src/route/gen/rr_graph_uxsdcxx_capnp.h`
- - `vpr/src/route/gen/rr_graph_uxsdcxx_interface.h`
+ - `libs/librrgraph/src/base/gen/rr_graph_uxsdcxx.h`
+ - `libs/librrgraph/src/base/gen/rr_graph_uxsdcxx_capnp.h`
+ - `libs/librrgraph/src/base/gen/rr_graph_uxsdcxx_interface.h`
  - `libs/libvtrcapnproto/rr_graph_uxsdcxx.capnp`
 
 ### Instructions to update generated files (using CMake)
 
 1. Run target `generate_rr_graph_serializers`, e.g. run `make generate_rr_graph_serializers`.
 2. Run target `format`, e.g. run `make format`.
-3. Update `vpr/src/route/rr_graph_uxsdcxx_interface_impl.h`, implement or
+3. Update `libs/librrgraph/src/base/rr_graph_uxsdcxx_interface_impl.h`, implement or
    update interfaces that are new or are changed.  The compiler will complain
    that virtual methods are missing if the schema has changed.
 
 ### Instructions to update generated files (manually)
 
 1. Clone https://github.com/duck2/uxsdcxx/
 2. Run `python3 -mpip install --user -r requirements.txt`
-3. Run `python3 uxsdcxx.py vpr/src/route/rr_graph.xsd`
-3. Run `python3 uxsdcap.py vpr/src/route/rr_graph.xsd`
+3. Run `python3 uxsdcxx.py libs/librrgraph/src/base/rr_graph.xsd`
+3. Run `python3 uxsdcap.py libs/librrgraph/src/base/rr_graph.xsd`
 4. Copy `rr_graph_uxsdcxx.h`, `rr_graph_uxsdcxx_capnp.h`,
-   `rr_graph_uxsdcxx_interface.h` to `vpr/src/route/`
-5. Copy `rr_graph_uxsdcxx.capnp` to `libs/libvtrcapnproto/`
+   `rr_graph_uxsdcxx_interface.h` to `libs/librrgraph/src/base/`
+5. Copy `rr_graph_uxsdcxx.capnp` to `../libvtrcapnproto/`
 6. Run `make format`
-7. Update `vpr/src/route/rr_graph_uxsdcxx_interface_impl.h`, implement or
+7. Update `libs/librrgraph/src/base/rr_graph_uxsdcxx_interface_impl.h`, implement or
    update interfaces that are new or are changed.  The compiler will complain
    that virtual methods are missing if the schema has changed.
 

libs/librrgraph/src/base/alloc_and_load_rr_indexed_data.h

@@ -0,0 +1,12 @@
+#ifndef ALLOC_AND_LOAD_RR_INDEXED_DATA_H
+#define ALLOC_AND_LOAD_RR_INDEXED_DATA_H
+
+#include "physical_types.h"
+
+void alloc_and_load_rr_indexed_data(const std::vector<t_segment_inf>& segment_inf,
+                                    const std::vector<t_segment_inf>& segment_inf_x,
+                                    const std::vector<t_segment_inf>& segment_inf_y,
+                                    int wire_to_ipin_switch,
+                                    enum e_base_cost_type base_cost_type);
+
+#endif