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Merged
merged 21 commits into from
Dec 23, 2021
Merged

RRGraphView edge_sink_node()/edge_switch() Implementation #1930

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975e37d
edge_switch api created and removed from node_impl.h
umariqbal-rs Dec 3, 2021
1f27d87
formatting has been set
umariqbal-rs Dec 3, 2021
2203367
comments and required chanings has been done
umariqbal-rs Dec 6, 2021
6d73d49
edge_switch() API implemented in rr_graph_view.h and deleted from rr_…
behzadmehmood-rs Dec 6, 2021
f28874f
formaating and warnings has been fixed
umariqbal-rs Dec 6, 2021
8a3abba
created edge_sink_node
umariqbal-rs Dec 6, 2021
e76f49c
edge_sink_node api created and changes in respective functions
umariqbal-rs Dec 8, 2021
ddaf9b1
warnings resolved
umariqbal-rs Dec 8, 2021
026c13c
removed from rr_node_impl.h
umariqbal-rs Dec 8, 2021
272d531
required changes done
umariqbal-rs Dec 9, 2021
5fda3ee
Merge branch 'master' of github.com:verilog-to-routing/vtr-verilog-to…
umariqbal-rs Dec 9, 2021
3d8c9e9
upstream
umariqbal-rs Dec 9, 2021
e3c30e0
required changes has been done
umariqbal-rs Dec 10, 2021
b73359f
changed to rr_node and removed open
umariqbal-rs Dec 15, 2021
61e0a9b
Updated readme
behzadmehmood-rs Dec 15, 2021
ae49c2c
conflicts resolved
umariqbal-rs Dec 15, 2021
353a0c4
resolved errors
umariqbal-rs Dec 15, 2021
d2de2b0
resolved num_edges
umariqbal-rs Dec 17, 2021
c4beebe
with a warning
umariqbal-rs Dec 17, 2021
bccca16
removed unsused argument
behzadmehmood-rs Dec 20, 2021
52a60bf
final comments and rr_graph argument has been added
umariqbal-rs Dec 21, 2021
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11 changes: 5 additions & 6 deletions vpr/src/device/rr_graph_view.h
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Original file line number Diff line number Diff line change
Expand Up @@ -248,16 +248,15 @@ class RRGraphView {
inline const char* node_side_string(RRNodeId node) const {
return node_storage_.node_side_string(node);
}
/*Get the switch id that represents the iedge'th outgoing edge from a specific node
/*@briefGet the switch id that represents the iedge'th outgoing edge from a specific node
* TODO: We may need to revisit this API and think about higher level APIs, like ``switch_delay()``
*/
**/
inline short edge_switch(RRNodeId id, t_edge_size iedge) const {
return node_storage_.edge_switch(id, iedge);
}
/* Get the destination node for the iedge'th edge from specified RRNodeId.
* //
* // This method should generally not be used, and instead first_edge and
* // last_edge should be used.*/
/** @brief Get the destination node for the iedge'th edge from specified RRNodeId.
* This method should generally not be used, and instead first_edge and
* last_edge should be used.*/
inline RRNodeId edge_sink_node(RRNodeId id, t_edge_size iedge) const {
return node_storage_.edge_sink_node(id, iedge);
}
Expand Down
14 changes: 7 additions & 7 deletions vpr/src/draw/draw.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -1686,10 +1686,10 @@ static void draw_rr_edges(int inode, ezgl::renderer* g) {
return; /* Nothing to draw. */
}

from_ptc_num = rr_graph.node_ptc_num(RRNodeId(inode));
from_ptc_num = rr_graph.node_ptc_num(rr_node);

for (t_edge_size iedge = 0, l = device_ctx.rr_nodes[inode].num_edges(); iedge < l; iedge++) {
to_node = size_t(rr_graph.edge_sink_node(RRNodeId(inode), iedge));
to_node = size_t(rr_graph.edge_sink_node(rr_node, iedge));
to_type = rr_graph.node_type(RRNodeId(to_node));
to_ptc_num = rr_graph.node_ptc_num(RRNodeId(to_node));
bool edge_configurable = device_ctx.rr_nodes[inode].edge_is_configurable(iedge);
Expand Down Expand Up @@ -1773,7 +1773,7 @@ static void draw_rr_edges(int inode, ezgl::renderer* g) {
g->set_color(blk_DARKGREEN);
}
switch_type = rr_graph.edge_switch(RRNodeId(inode), iedge);
draw_chanx_to_chanx_edge(RRNodeId(inode), RRNodeId(to_node),
draw_chanx_to_chanx_edge(rr_node, RRNodeId(to_node),
to_ptc_num, switch_type, g);
break;

Expand All @@ -1789,7 +1789,7 @@ static void draw_rr_edges(int inode, ezgl::renderer* g) {
} else {
g->set_color(blk_DARKGREEN);
}
switch_type = rr_graph.edge_switch(RRNodeId(inode), iedge);
switch_type = rr_graph.edge_switch(rr_node, iedge);
draw_chanx_to_chany_edge(inode, from_ptc_num, to_node,
to_ptc_num, FROM_X_TO_Y, switch_type, g);
break;
Expand Down Expand Up @@ -1842,7 +1842,7 @@ static void draw_rr_edges(int inode, ezgl::renderer* g) {
} else {
g->set_color(blk_DARKGREEN);
}
switch_type = rr_graph.edge_switch(RRNodeId(inode), iedge);
switch_type = rr_graph.edge_switch(rr_node, iedge);
draw_chanx_to_chany_edge(to_node, to_ptc_num, inode,
from_ptc_num, FROM_Y_TO_X, switch_type, g);
break;
Expand All @@ -1860,8 +1860,8 @@ static void draw_rr_edges(int inode, ezgl::renderer* g) {
} else {
g->set_color(blk_DARKGREEN);
}
switch_type = rr_graph.edge_switch(RRNodeId(inode), iedge);
draw_chany_to_chany_edge(RRNodeId(inode), RRNodeId(to_node),
switch_type = rr_graph.edge_switch(rr_node, iedge);
draw_chany_to_chany_edge(rr_node, RRNodeId(to_node),
to_ptc_num, switch_type, g);
break;

Expand Down
4 changes: 2 additions & 2 deletions vpr/src/power/power.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -982,9 +982,9 @@ static void power_usage_routing(t_power_usage* power_usage,
connectionbox_fanout = 0;
switchbox_fanout = 0;
for (t_edge_size iedge = 0; iedge < node.num_edges(); iedge++) {
if (rr_graph.edge_switch(RRNodeId(rr_node_idx), iedge) == routing_arch->wire_to_rr_ipin_switch) {
if (rr_graph.edge_switch(rr_node, iedge) == routing_arch->wire_to_rr_ipin_switch) {
connectionbox_fanout++;
} else if (rr_graph.edge_switch(RRNodeId(rr_node_idx), iedge) == routing_arch->delayless_switch) {
} else if (rr_graph.edge_switch(rr_node, iedge) == routing_arch->delayless_switch) {
/* Do nothing */
} else {
switchbox_fanout++;
Expand Down
8 changes: 4 additions & 4 deletions vpr/src/route/check_rr_graph.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -80,7 +80,7 @@ void check_rr_graph(const t_graph_type graph_type,
edges.reserve(num_edges);

for (int iedge = 0; iedge < num_edges; iedge++) {
int to_node = size_t(rr_graph.edge_sink_node(RRNodeId(inode), iedge));
int to_node = size_t(rr_graph.edge_sink_node(rr_node, iedge));

if (to_node < 0 || to_node >= (int)device_ctx.rr_nodes.size()) {
VPR_FATAL_ERROR(VPR_ERROR_ROUTE,
Expand All @@ -94,7 +94,7 @@ void check_rr_graph(const t_graph_type graph_type,
edges.emplace_back(to_node, iedge);
total_edges_to_node[to_node]++;

auto switch_type = rr_graph.edge_switch(RRNodeId(inode), iedge);
auto switch_type = rr_graph.edge_switch(rr_node, iedge);

if (switch_type < 0 || switch_type >= num_rr_switches) {
VPR_FATAL_ERROR(VPR_ERROR_ROUTE,
Expand All @@ -110,7 +110,7 @@ void check_rr_graph(const t_graph_type graph_type,

//Check that multiple edges between the same from/to nodes make sense
for (int iedge = 0; iedge < num_edges; iedge++) {
int to_node = size_t(rr_graph.edge_sink_node(RRNodeId(inode), iedge));
int to_node = size_t(rr_graph.edge_sink_node(rr_node, iedge));

auto range = std::equal_range(edges.begin(), edges.end(),
to_node, node_edge_sorter());
Expand Down Expand Up @@ -158,7 +158,7 @@ void check_rr_graph(const t_graph_type graph_type,
std::map<short, int> switch_counts;
for (const auto& to_edge : vtr::Range<decltype(edges)::const_iterator>(range.first, range.second)) {
auto edge = to_edge.second;
auto edge_switch = rr_graph.edge_switch(RRNodeId(inode), edge);
auto edge_switch = rr_graph.edge_switch(rr_node, edge);

switch_counts[edge_switch]++;
}
Expand Down
4 changes: 2 additions & 2 deletions vpr/src/route/rr_graph_area.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -167,7 +167,7 @@ void count_bidir_routing_transistors(int num_switch, int wire_to_ipin_switch, fl
num_edges = device_ctx.rr_nodes[from_node].num_edges();

for (iedge = 0; iedge < num_edges; iedge++) {
RRNodeId to_node = RRNodeId(size_t(rr_graph.edge_sink_node(RRNodeId(from_node), iedge)));
RRNodeId to_node = RRNodeId(rr_graph.edge_sink_node(RRNodeId(from_node), iedge));
to_rr_type = rr_graph.node_type(to_node);

/* Ignore any uninitialized rr_graph nodes */
Expand Down Expand Up @@ -365,7 +365,7 @@ void count_unidir_routing_transistors(std::vector<t_segment_inf>& /*segment_inf*

/* Increment number of inputs per cblock if IPIN */
for (iedge = 0; iedge < num_edges; iedge++) {
RRNodeId to_node = RRNodeId(size_t(rr_graph.edge_sink_node(RRNodeId(from_node), iedge)));
RRNodeId to_node = RRNodeId(rr_graph.edge_sink_node(RRNodeId(from_node), iedge));
to_rr_type = rr_graph.node_type(to_node);

/* Ignore any uninitialized rr_graph nodes */
Expand Down