Vtr flow script py rewrite

.travis.yml

@@ -15,6 +15,7 @@ addons:
     - sourceline: 'deb http://apt.llvm.org/trusty llvm-toolchain-trusty-8 main'
       key_url: 'https://apt.llvm.org/llvm-snapshot.gpg.key'
     - sourceline: 'ppa:ubuntu-toolchain-r/test'
+    - sourceline: 'ppa:deadsnakes/ppa' # For python3.6
     packages:
     - autoconf
     - automake
@@ -44,6 +45,7 @@ addons:
     - libxml++2.6-dev
     - perl
     - python
+    - python3.6
     - python-lxml
     - texinfo
     - time

dev/tutorial/NewDeveloperTutorial.txt

@@ -80,14 +80,14 @@ Task #5 - Open the Black Box
 
   1.  Using the custom Verilog circuit and architecture created in Task #4, 
   directly run Odin II on it to generate a blif netlist.  You may need to skim the Odin II
-  readme file and the vtr_flow/scripts/run_vtr_flow.pl.
+  readme file and the vtr_flow/scripts/run_vtr_flow.py.
 
   2.  Using the output netlist of Odin II, run ABC to generate a technology-mapped blif file.
-  You may need to skim vtr_flow/scripts/run_vtr_flow.pl.
+  You may need to skim vtr_flow/scripts/run_vtr_flow.py.
 
   3.  Using the output of ABC, run VPR to complete the mapping of a user circuit 
   to a target architecture.  You may need to consult the VPR User Manual and skim
-  You may need to skim vtr_flow/scripts/run_vtr_flow.pl.
+  You may need to skim vtr_flow/scripts/run_vtr_flow.py.
 
   4.  Read the VPR section of the online documentation.
 

doc/src/dev/tutorials/new_developer_tutorial.rst

@@ -57,7 +57,7 @@ Open the Black Box
 
 At this stage, you have gotten a taste of how an FPGA architect would go about using VTR.  As a developer though, you need a much deeper understanding of how this tool works.  The purpose of this section is to have you to learn the details of the VTR CAD flow by having you manually do what the scripts do.
 
-Using the custom Verilog circuit and architecture created in the previous step, directly run Odin II on it to generate a blif netlist.  You may need to skim the ``ODIN_II/README.rst`` and the ``vtr_flow/scripts/run_vtr_flow.pl``.
+Using the custom Verilog circuit and architecture created in the previous step, directly run Odin II on it to generate a blif netlist.  You may need to skim the ``ODIN_II/README.rst`` and the ``vtr_flow/scripts/run_vtr_flow.py``.
 
 Using the output netlist of Odin II, run ABC to generate a technology-mapped blif file.  You may need to skim the ABC homepage (http://www.eecs.berkeley.edu/~alanmi/abc/).
 

doc/src/tutorials/flow/basic_flow.rst

@@ -46,7 +46,7 @@ The following steps show you to run the VTR design flow to map a sample circuit
 
     Some also contain a ``golden_results.txt`` file that is used by the scripts to check for correctness.
 
-    The ``vtr_release/vtr_flow/scripts/run_vtr_flow.pl`` script describes the CAD flow employed in the test.
+    The ``vtr_release/vtr_flow/scripts/run_vtr_flow.py`` script describes the CAD flow employed in the test.
     You can modify the flow by editing this script.
 
     At this point, feel free to run any of the tasks pre-pended with "regression".

doc/src/vtr/power_estimation/index.rst

@@ -33,8 +33,8 @@ The easiest way to run the VTR flow is to use the :ref:`run_vtr_flow` script.
 
 In order to perform power estimation, you must add the following options:
 
-  * :option:`run_vtr_flow.pl -power`
-  * :option:`run_vtr_flow.pl -cmos_tech` ``<cmos_tech_properties_file>``
+  * :option:`run_vtr_flow.py -power`
+  * :option:`run_vtr_flow.py -cmos_tech` ``<cmos_tech_properties_file>``
 
 The CMOS technology properties file is an XML file that contains relevant process-dependent information needed for power estimation.
 XML files for 22nm, 45nm, and 130nm PTM models can be found here::

doc/src/vtr/run_vtr_flow.rst

@@ -7,16 +7,16 @@ This script runs the VTR flow for a single benchmark circuit and architecture fi
 
 The script is located at::
 
-    $VTR_ROOT/vtr_flow/scripts/run_vtr_flow.pl
+    $VTR_ROOT/vtr_flow/scripts/run_vtr_flow.py
 
-.. program:: run_vtr_flow.pl
+.. program:: run_vtr_flow.py
 
 Basic Usage
 ~~~~~~~~~~~
 
-At a minimum ``run_vtr_flow.pl`` requires two command-line arguments::
+At a minimum ``run_vtr_flow.py`` requires two command-line arguments::
 
-    run_vtr_flow.pl <circuit_file> <architecture_file>
+    run_vtr_flow.py <circuit_file> <architecture_file>
 
 where:
 
@@ -44,20 +44,20 @@ The script will also produce an output files (\*.out) for each stage, containing
 Advanced Usage
 ~~~~~~~~~~~~~~
 
-Additional *optional* command arguments can also be passed to ``run_vtr_flow.pl``::
+Additional *optional* command arguments can also be passed to ``run_vtr_flow.py``::
 
-    run_vtr_flow.pl <circuit_file> <architecture_file> [<options>] [<vpr_options>]
+    run_vtr_flow.py <circuit_file> <architecture_file> [<options>] [<vpr_options>]
 
 where:
 
-  * ``<options>`` are additional arguments passed to ``run_vtr_flow.pl`` (described below),
-  * ``<vpr_options>`` are any arguments not recognized by ``run_vtr_flow.pl``. These will be forwarded to VPR.
+  * ``<options>`` are additional arguments passed to ``run_vtr_flow.py`` (described below),
+  * ``<vpr_options>`` are any arguments not recognized by ``run_vtr_flow.py``. These will be forwarded to VPR.
 
 For example::
 
-   run_vtr_flow.pl my_circuit.v my_arch.xml -track_memory_usage --pack --place
+   run_vtr_flow.py my_circuit.v my_arch.xml -track_memory_usage --pack --place
 
-will run the VTR flow to map the circuit ``my_circuit.v`` onto the architecture ``my_arch.xml``; the arguments ``--pack`` and ``--place`` will be passed to VPR (since they are unrecognized arguments to ``run_vtr_flow.pl``).
+will run the VTR flow to map the circuit ``my_circuit.v`` onto the architecture ``my_arch.xml``; the arguments ``--pack`` and ``--place`` will be passed to VPR (since they are unrecognized arguments to ``run_vtr_flow.py``).
 They will cause VPR to perform only :ref:`packing and placement <general_options>`.
 
 Detailed Command-line Options

doc/src/vtr/running_vtr.rst

@@ -24,7 +24,7 @@ The :ref:`run_vtr_flow` script is provided to execute the VTR flow for a single
 
 .. code-block:: none
 
-    $VTR_ROOT/vtr_flow/scripts/run_vtr_flow.pl <circuit_file> <architecture_file>
+    $VTR_ROOT/vtr_flow/scripts/run_vtr_flow.py <circuit_file> <architecture_file>
 
 It requires two arguments:
 
@@ -41,7 +41,7 @@ Architecture files can be found under::
 
 The script can also be used to run parts of the VTR flow.
 
-.. seealso:: :ref:`run_vtr_flow` for the detailed command line options of ``run_vtr_flow.pl``.
+.. seealso:: :ref:`run_vtr_flow` for the detailed command line options of ``run_vtr_flow.py``.
 
 
 Running Multiple Benchmarks & Architectures with Tasks

run_reg_test.pl

@@ -65,6 +65,7 @@
 my $skip_qor = 0;
 my $show_failures = 0;
 my $num_cpu = 1;
+my $script = "run_vtr_flow.py";
 my $long_task_names = 0;
 
 # Parse Input Arguments
@@ -87,6 +88,8 @@
 		$long_task_names = 1;
 	} elsif ( $token eq "-j" ) { #-j N
 		$num_cpu = int(shift(@ARGV));
+	} elsif ( $token eq "-script" ) {
+		$script = shift(@ARGV);
     } elsif ( $token =~ /^-j(\d+)$/ ) { #-jN
         $num_cpu = int($1);
 	} elsif ($token eq "quick_test") {
@@ -337,10 +340,10 @@ sub run_single_test {
 
 	print "\nRunning $test\n";
 	print "-------------------------------------------------------------------------------\n";
-	print "scripts/run_vtr_task.pl $run_params \n";
+	print "scripts/run_vtr_task.pl $run_params -script $script \n";
 	print "\n";
 	chdir("$vtr_flow_path");
-	my $test_status = system("scripts/run_vtr_task.pl $run_params \n");
+	my $test_status = system("scripts/run_vtr_task.pl $run_params -script $script \n");
 	chdir("..");
 
     #Perl is obtuse, and requires you to manually shift the return value by 8 bits

vtr_flow/scripts/python_libs/doc/Makefile

@@ -0,0 +1,20 @@
+# Minimal makefile for Sphinx documentation
+#
+
+# You can set these variables from the command line, and also
+# from the environment for the first two.
+SPHINXOPTS    ?=
+SPHINXBUILD   ?= sphinx-build
+SOURCEDIR     = .
+BUILDDIR      = _build
+
+# Put it first so that "make" without argument is like "make help".
+help:
+	@$(SPHINXBUILD) -M help "$(SOURCEDIR)" "$(BUILDDIR)" $(SPHINXOPTS) $(O)
+
+.PHONY: help Makefile
+
+# Catch-all target: route all unknown targets to Sphinx using the new
+# "make mode" option.  $(O) is meant as a shortcut for $(SPHINXOPTS).
+%: Makefile
+	@$(SPHINXBUILD) -M $@ "$(SOURCEDIR)" "$(BUILDDIR)" $(SPHINXOPTS) $(O)

vtr_flow/scripts/python_libs/doc/conf.py

@@ -0,0 +1,44 @@
+# -- Path setup --------------------------------------------------------------
+import os
+import sys
+import sphinx_rtd_theme
+sys.path.insert(0, os.path.abspath('..'))
+
+
+# -- Project information -----------------------------------------------------
+
+project = u'Verilog-to-Routing'
+copyright = u'2016, VTR Developers'
+author = u'VTR Developers'
+
+# -- General configuration ---------------------------------------------------
+
+# Add any Sphinx extension module names here, as strings. They can be
+# extensions coming with Sphinx (named 'sphinx.ext.*') or your custom
+# ones.
+extensions = [
+	"sphinx_rtd_theme",
+	'sphinx.ext.autodoc',
+	'sphinx.ext.napoleon',
+]
+
+# Add any paths that contain templates here, relative to this directory.
+templates_path = ['_templates']
+
+# List of patterns, relative to source directory, that match files and
+# directories to ignore when looking for source files.
+# This pattern also affects html_static_path and html_extra_path.
+exclude_patterns = ['_build', 'Thumbs.db', '.DS_Store']
+
+
+# -- Options for HTML output -------------------------------------------------
+
+# The theme to use for HTML and HTML Help pages.  See the documentation for
+# a list of builtin themes.
+#
+html_theme = 'sphinx_rtd_theme'
+
+# Add any paths that contain custom static files (such as style sheets) here,
+# relative to this directory. They are copied after the builtin static files,
+# so a file named "default.css" will overwrite the builtin "default.css".
+html_static_path = ['_static']

vtr_flow/scripts/python_libs/doc/index.rst

@@ -0,0 +1,24 @@
+Welcome to VTR's documentation!
+===============================
+.. automodule:: vtr.flow
+    :members: run
+.. automodule:: vtr.odin.odin
+    :members: 
+.. automodule:: vtr.abc.abc
+    :members: 
+.. automodule:: vtr.ace.ace_flow
+    :members: 
+.. automodule:: vtr.vpr.vpr
+    :members: 
+.. toctree::
+   :maxdepth: 2
+   :caption: Contents:
+
+
+
+Indices and tables
+==================
+
+* :ref:`genindex`
+* :ref:`modindex`
+* :ref:`search`

vtr_flow/scripts/python_libs/doc/make.bat

@@ -0,0 +1,35 @@
+@ECHO OFF
+
+pushd %~dp0
+
+REM Command file for Sphinx documentation
+
+if "%SPHINXBUILD%" == "" (
+	set SPHINXBUILD=sphinx-build
+)
+set SOURCEDIR=.
+set BUILDDIR=_build
+
+if "%1" == "" goto help
+
+%SPHINXBUILD% >NUL 2>NUL
+if errorlevel 9009 (
+	echo.
+	echo.The 'sphinx-build' command was not found. Make sure you have Sphinx
+	echo.installed, then set the SPHINXBUILD environment variable to point
+	echo.to the full path of the 'sphinx-build' executable. Alternatively you
+	echo.may add the Sphinx directory to PATH.
+	echo.
+	echo.If you don't have Sphinx installed, grab it from
+	echo.http://sphinx-doc.org/
+	exit /b 1
+)
+
+%SPHINXBUILD% -M %1 %SOURCEDIR% %BUILDDIR% %SPHINXOPTS% %O%
+goto end
+
+:help
+%SPHINXBUILD% -M help %SOURCEDIR% %BUILDDIR% %SPHINXOPTS% %O%
+
+:end
+popd

vtr_flow/scripts/python_libs/vtr/__init__.py

@@ -0,0 +1,8 @@
+from .util import load_config_lines, mkdir_p, find_vtr_file, CommandRunner, print_verbose, relax_W, file_replace, make_enum, RawDefaultHelpFormatter, VERBOSITY_CHOICES,format_elapsed_time, write_tab_delimitted_csv, load_list_file, find_vtr_root, argparse_str2bool, get_next_run_dir, get_latest_run_dir, verify_file
+from .inspect import determine_lut_size, determine_min_W, determine_memory_addr_width
+from .abc import run, run_lec
+from .vpr import run,run_relax_W,cmp_full_vs_incr_STA
+from .odin import run
+from .ace import run
+from .error import *
+from .flow import run, VTR_STAGE

vtr_flow/scripts/python_libs/vtr/abc/__init__.py

@@ -0,0 +1 @@
+from .abc import run, run_lec