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acomodiacomodi
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equivalent: fix potential segfaults
Signed-off-by: Alessandro Comodi <[email protected]>
1 parent 81769c2 commit bcda27d

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2 files changed

+30
-18
lines changed

2 files changed

+30
-18
lines changed

‎vpr/src/pack/output_clustering.cpp

Lines changed: 17 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -63,19 +63,24 @@ static void print_stats() {
6363
/* Counters used only for statistics purposes. */
6464

6565
for (auto blk_id : cluster_ctx.clb_nlist.blocks()) {
66-
// XXX Use mapping here
67-
auto type = cluster_ctx.clb_nlist.block_type(blk_id)->equivalent_tiles[0];
68-
for (ipin = 0; ipin < type->num_pins; ipin++) {
66+
auto logical_block = cluster_ctx.clb_nlist.block_type(blk_id);
67+
auto physical_tile = pick_random_physical_type(logical_block);
68+
for (ipin = 0; ipin < logical_block->pb_type->num_pins; ipin++) {
69+
int phy_pin = get_physical_pin(physical_tile, logical_block, ipin);
70+
auto pin_class = physical_tile->pin_class[phy_pin];
71+
auto pin_class_inf = physical_tile->class_inf[pin_class];
72+
6973
if (cluster_ctx.clb_nlist.block_pb(blk_id)->pb_route.empty()) {
7074
ClusterNetId clb_net_id = cluster_ctx.clb_nlist.block_net(blk_id, ipin);
7175
if (clb_net_id != ClusterNetId::INVALID()) {
7276
auto net_id = atom_ctx.lookup.atom_net(clb_net_id);
7377
VTR_ASSERT(net_id);
7478
nets_absorbed[net_id] = false;
75-
if (type->class_inf[type->pin_class[ipin]].type == RECEIVER) {
76-
num_clb_inputs_used[type->index]++;
77-
} else if (type->class_inf[type->pin_class[ipin]].type == DRIVER) {
78-
num_clb_outputs_used[type->index]++;
79+
80+
if (pin_class_inf.type == RECEIVER) {
81+
num_clb_inputs_used[logical_block->index]++;
82+
} else if (pin_class_inf.type == DRIVER) {
83+
num_clb_outputs_used[logical_block->index]++;
7984
}
8085
}
8186
} else {
@@ -87,16 +92,16 @@ static void print_stats() {
8792
auto atom_net_id = pb->pb_route[pb_graph_pin_id].atom_net_id;
8893
if (atom_net_id) {
8994
nets_absorbed[atom_net_id] = false;
90-
if (type->class_inf[type->pin_class[ipin]].type == RECEIVER) {
91-
num_clb_inputs_used[type->index]++;
92-
} else if (type->class_inf[type->pin_class[ipin]].type == DRIVER) {
93-
num_clb_outputs_used[type->index]++;
95+
if (pin_class_inf.type == RECEIVER) {
96+
num_clb_inputs_used[logical_block->index]++;
97+
} else if (pin_class_inf.type == DRIVER) {
98+
num_clb_outputs_used[logical_block->index]++;
9499
}
95100
}
96101
}
97102
}
98103
}
99-
num_clb_types[type->index]++;
104+
num_clb_types[logical_block->index]++;
100105
}
101106

102107
for (itype = 0; itype < device_ctx.logical_block_types.size(); itype++) {

‎vpr/src/place/place_macro.cpp

Lines changed: 13 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -77,11 +77,16 @@ static void find_all_the_macro(int* num_of_macro, std::vector<ClusterBlockId>& p
7777

7878
num_macro = 0;
7979
for (auto blk_id : cluster_ctx.clb_nlist.blocks()) {
80+
auto logical_block = cluster_ctx.clb_nlist.block_type(blk_id);
81+
auto physical_tile = pick_random_physical_type(logical_block);
82+
8083
num_blk_pins = cluster_ctx.clb_nlist.block_type(blk_id)->pb_type->num_pins;
8184
for (to_iblk_pin = 0; to_iblk_pin < num_blk_pins; to_iblk_pin++) {
85+
int to_phy_pin = get_physical_pin(physical_tile, logical_block, to_iblk_pin);
86+
8287
to_net_id = cluster_ctx.clb_nlist.block_net(blk_id, to_iblk_pin);
83-
to_idirect = f_idirect_from_blk_pin[cluster_ctx.clb_nlist.block_type(blk_id)->index][to_iblk_pin];
84-
to_src_or_sink = f_direct_type_from_blk_pin[cluster_ctx.clb_nlist.block_type(blk_id)->index][to_iblk_pin];
88+
to_idirect = f_idirect_from_blk_pin[physical_tile->index][to_phy_pin];
89+
to_src_or_sink = f_direct_type_from_blk_pin[physical_tile->index][to_phy_pin];
8590

8691
// Identify potential macro head blocks (i.e. start of a macro)
8792
//
@@ -97,9 +102,11 @@ static void find_all_the_macro(int* num_of_macro, std::vector<ClusterBlockId>& p
97102
|| (is_constant_clb_net(to_net_id)
98103
&& !net_is_driven_by_direct(to_net_id)))) {
99104
for (from_iblk_pin = 0; from_iblk_pin < num_blk_pins; from_iblk_pin++) {
105+
int from_phy_pin = get_physical_pin(physical_tile, logical_block, from_iblk_pin);
106+
100107
from_net_id = cluster_ctx.clb_nlist.block_net(blk_id, from_iblk_pin);
101-
from_idirect = f_idirect_from_blk_pin[cluster_ctx.clb_nlist.block_type(blk_id)->index][from_iblk_pin];
102-
from_src_or_sink = f_direct_type_from_blk_pin[cluster_ctx.clb_nlist.block_type(blk_id)->index][from_iblk_pin];
108+
from_idirect = f_idirect_from_blk_pin[physical_tile->index][from_phy_pin];
109+
from_src_or_sink = f_direct_type_from_blk_pin[physical_tile->index][from_phy_pin];
103110

104111
// Confirm whether this is a head macro
105112
//
@@ -129,8 +136,8 @@ static void find_all_the_macro(int* num_of_macro, std::vector<ClusterBlockId>& p
129136
next_blk_id = cluster_ctx.clb_nlist.net_pin_block(curr_net_id, 1);
130137

131138
// Assume that the from_iblk_pin index is the same for the next block
132-
VTR_ASSERT(f_idirect_from_blk_pin[cluster_ctx.clb_nlist.block_type(next_blk_id)->index][from_iblk_pin] == from_idirect
133-
&& f_direct_type_from_blk_pin[cluster_ctx.clb_nlist.block_type(next_blk_id)->index][from_iblk_pin] == SOURCE);
139+
VTR_ASSERT(f_idirect_from_blk_pin[physical_tile->index][from_phy_pin] == from_idirect
140+
&& f_direct_type_from_blk_pin[physical_tile->index][from_phy_pin] == SOURCE);
134141
next_net_id = cluster_ctx.clb_nlist.block_net(next_blk_id, from_iblk_pin);
135142

136143
// Mark down this block as a member of the macro

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