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Force operator< to be inlined to reduce place time
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vpr/src/place/place_delay_model.h

Lines changed: 22 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -6,6 +6,20 @@
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#include "vpr_types.h"
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#include "router_delay_profiling.h"
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9+
#ifndef __has_attribute
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#define __has_attribute(x) 0 // Compatibility with non-clang compilers.
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#endif
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#if defined(COMPILER_GCC) && defined(NDEBUG)
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#define ALWAYS_INLINE inline __attribute__((__always_inline__))
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#elif defined(COMPILER_MSVC) && defined(NDEBUG)
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#define ALWAYS_INLINE __forceinline
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#elif __has_attribute(always_inline)
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#define ALWAYS_INLINE __attribute__((always_inline)) // clang
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#else
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#define ALWAYS_INLINE inline
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#endif
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//Abstract interface to a placement delay model
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class PlaceDelayModel {
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public:
@@ -95,9 +109,14 @@ class OverrideDelayModel : public PlaceDelayModel {
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short delta_x;
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short delta_y;
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friend bool operator<(const t_override& lhs, const t_override& rhs) {
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return std::tie(lhs.from_type, lhs.to_type, lhs.from_class, lhs.to_class, lhs.delta_x, lhs.delta_y)
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< std::tie(rhs.from_type, rhs.to_type, rhs.from_class, rhs.to_class, rhs.delta_x, rhs.delta_y);
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//A combination of ALWAYS_INLINE attribute and std::lexicographical_compare
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//is required for operator< to be inlined by compiler.
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//Proper inlining of the function reduces place time by around 5%.
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//For more information: https://github.com/verilog-to-routing/vtr-verilog-to-routing/issues/1225
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friend ALWAYS_INLINE bool operator<(const t_override& lhs, const t_override& rhs) {
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const short *left = reinterpret_cast<const short*> (&lhs);
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const short *right = reinterpret_cast<const short*> (&rhs);
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return std::lexicographical_compare(left, left+6, right, right+6);
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}
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};
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