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tangxifantangxifan
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[core] adapt to side var changes
1 parent 83f8bfe commit 9ddf4ca

11 files changed

+36
-35
lines changed

‎libs/librrgraph/src/base/rr_graph_builder.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -78,7 +78,7 @@ void RRGraphBuilder::add_node_to_all_locs(RRNodeId node) {
7878
}
7979

8080
RRNodeId RRGraphBuilder::create_node(int layer, int x, int y, t_rr_type type, int ptc, e_side side) {
81-
e_side node_side = SIDES[0];
81+
e_side node_side = TOTAL_2D_SIDES[0];
8282
/* Only OPIN and IPIN nodes have sides, otherwise force to use a default side */
8383
if (OPIN == type || IPIN == type) {
8484
node_side = side;

‎libs/librrgraph/src/base/rr_graph_builder.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -131,7 +131,7 @@ class RRGraphBuilder {
131131
/** @brief Create a new rr_node in the node storage and register it to the node look-up.
132132
* Return a valid node id if succeed. Otherwise, return an invalid id.
133133
*/
134-
RRNodeId create_node(int layer, int x, int y, t_rr_type type, int ptc, e_side side = NUM_SIDES);
134+
RRNodeId create_node(int layer, int x, int y, t_rr_type type, int ptc, e_side side = NUM_2D_SIDES);
135135

136136
/** @brief Set the node name with a given valid id */
137137
inline void set_node_name(RRNodeId id, std::string name) {

‎vpr/src/route/rr_graph.cpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -744,6 +744,7 @@ void create_rr_graph(const t_graph_type graph_type,
744744
det_routing_arch->global_route_switch,
745745
det_routing_arch->wire_to_arch_ipin_switch,
746746
det_routing_arch->wire_to_arch_ipin_switch_between_dice,
747+
router_opts.custom_3d_sb_fanin_fanout,
747748
det_routing_arch->delayless_switch,
748749
det_routing_arch->R_minW_nmos,
749750
det_routing_arch->R_minW_pmos,

‎vpr/src/tileable_rr_graph/openfpga_rr_graph_utils.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -188,14 +188,14 @@ bool is_ipin_direct_connected_opin(const RRGraphView& rr_graph,
188188
* Note that this function expect one valid side to be got. Otherwise, it will fail! */
189189
e_side get_rr_graph_single_node_side(const RRGraphView& rr_graph,
190190
const RRNodeId& node) {
191-
e_side node_side = NUM_SIDES;
191+
e_side node_side = NUM_2D_SIDES;
192192
int num_sides = 0;
193-
for (e_side candidate_side : SIDES) {
193+
for (e_side candidate_side : TOTAL_2D_SIDES) {
194194
if (rr_graph.is_node_on_specific_side(node, candidate_side)) {
195195
node_side = candidate_side;
196196
num_sides++;
197197
}
198198
}
199-
VTR_ASSERT(1 == num_sides && node_side != NUM_SIDES);
199+
VTR_ASSERT(1 == num_sides && node_side != NUM_2D_SIDES);
200200
return node_side;
201201
}

‎vpr/src/tileable_rr_graph/openfpga_side_manager.cpp

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -9,7 +9,7 @@ SideManager::SideManager(enum e_side side) {
99
}
1010

1111
SideManager::SideManager() {
12-
side_ = NUM_SIDES;
12+
side_ = NUM_2D_SIDES;
1313
}
1414

1515
SideManager::SideManager(size_t side) {
@@ -32,7 +32,7 @@ enum e_side SideManager::get_opposite() const {
3232
case LEFT:
3333
return RIGHT;
3434
default:
35-
return NUM_SIDES;
35+
return NUM_2D_SIDES;
3636
}
3737
}
3838

@@ -47,7 +47,7 @@ enum e_side SideManager::get_rotate_clockwise() const {
4747
case LEFT:
4848
return TOP;
4949
default:
50-
return NUM_SIDES;
50+
return NUM_2D_SIDES;
5151
}
5252
}
5353

@@ -62,12 +62,12 @@ enum e_side SideManager::get_rotate_counterclockwise() const {
6262
case LEFT:
6363
return BOTTOM;
6464
default:
65-
return NUM_SIDES;
65+
return NUM_2D_SIDES;
6666
}
6767
}
6868

6969
bool SideManager::validate() const {
70-
if (NUM_SIDES == side_) {
70+
if (NUM_2D_SIDES == side_) {
7171
return false;
7272
}
7373
return true;
@@ -144,7 +144,7 @@ void SideManager::set_side(size_t side) {
144144
side_ = LEFT;
145145
return;
146146
default:
147-
side_ = NUM_SIDES;
147+
side_ = NUM_2D_SIDES;
148148
return;
149149
}
150150
}

‎vpr/src/tileable_rr_graph/rr_graph_view_util.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -45,7 +45,7 @@ std::vector<RRNodeId> find_rr_graph_nodes(const RRGraphView& rr_graph,
4545
if (rr_type == IPIN || rr_type == OPIN) {
4646
//For pins we need to look at all the sides of the current grid tile
4747

48-
for (e_side side : SIDES) {
48+
for (e_side side : TOTAL_2D_SIDES) {
4949
RRNodeId rr_node_index = rr_graph.node_lookup().find_node(layer, x, y, rr_type, ptc, side);
5050

5151
if (rr_node_index != RRNodeId::INVALID()) {
@@ -106,7 +106,7 @@ std::vector<RRNodeId> find_rr_graph_grid_nodes(const RRGraphView& rr_graph,
106106
}
107107

108108
/* Ensure we have a valid side */
109-
VTR_ASSERT(side != NUM_SIDES);
109+
VTR_ASSERT(side != NUM_2D_SIDES);
110110

111111
/* Find all the pins on the side of the grid */
112112
t_physical_tile_loc tile_loc(x, y, layer);

‎vpr/src/tileable_rr_graph/rr_gsb.cpp

Lines changed: 13 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -28,7 +28,7 @@ RRGSB::RRGSB() {
2828

2929
opin_node_.clear();
3030
for (size_t icb_type = 0; icb_type < 2; icb_type++) {
31-
for (size_t iside = 0; iside < NUM_SIDES; iside++) {
31+
for (size_t iside = 0; iside < NUM_2D_SIDES; iside++) {
3232
cb_opin_node_[icb_type][iside].clear();
3333
}
3434
}
@@ -401,7 +401,7 @@ void RRGSB::get_node_side_and_index(const RRGraphView& rr_graph,
401401

402402
if (side == get_num_sides()) {
403403
/* we find nothing, return NUM_SIDES, and a OPEN node (-1) */
404-
node_side = NUM_SIDES;
404+
node_side = NUM_2D_SIDES;
405405
VTR_ASSERT(-1 == node_index);
406406
return;
407407
}
@@ -517,7 +517,7 @@ bool RRGSB::is_sb_node_passing_wire(const RRGraphView& rr_graph,
517517
*/
518518
if (true != is_sb_node_exist_opposite_side(rr_graph, track_node, node_side)) {
519519
VTR_LOG("Cannot find a node on the opposite side to GSB[%lu][%lu] track node[%lu] at %s!\nDetailed node information:\n",
520-
get_x(), get_y(), track_id, SIDE_STRING[node_side]);
520+
get_x(), get_y(), track_id, TOTAL_2D_SIDE_STRINGS[node_side]);
521521
VTR_LOG("Node type: %s\n", rr_graph.node_type_string(track_node));
522522
VTR_LOG("Node coordinate: %s\n", rr_graph.node_coordinate_to_string(track_node).c_str());
523523
VTR_LOG("Node ptc: %d\n", rr_graph.node_ptc_num(track_node));
@@ -790,12 +790,12 @@ void RRGSB::sort_chan_node_in_edges(const RRGraphView& rr_graph,
790790
for (const RREdgeId& edge : rr_graph.node_in_edges(chan_node)) {
791791
/* We care the source node of this edge, and it should be an input of the GSB!!! */
792792
const RRNodeId& src_node = rr_graph.edge_src_node(edge);
793-
e_side side = NUM_SIDES;
793+
e_side side = NUM_2D_SIDES;
794794
int index = 0;
795795
get_node_side_and_index(rr_graph, src_node, IN_PORT, side, index);
796796

797797
/* Must have valid side and index */
798-
if (NUM_SIDES == side) {
798+
if (NUM_2D_SIDES == side) {
799799
VTR_LOG("GSB[%lu][%lu]:\n", get_x(), get_y());
800800
VTR_LOG("----------------------------------\n");
801801
VTR_LOG("SRC node:\n");
@@ -815,7 +815,7 @@ void RRGSB::sort_chan_node_in_edges(const RRGraphView& rr_graph,
815815
}
816816
}
817817

818-
VTR_ASSERT(NUM_SIDES != side);
818+
VTR_ASSERT(NUM_2D_SIDES != side);
819819
VTR_ASSERT(OPEN != index);
820820

821821
if (OPIN == rr_graph.node_type(src_node)) {
@@ -873,7 +873,7 @@ void RRGSB::sort_ipin_node_in_edges(const RRGraphView& rr_graph,
873873
const e_side& ipin_side,
874874
const size_t& ipin_id) {
875875
std::map<size_t, RREdgeId> from_track_edge_map;
876-
std::array<std::map<size_t, RREdgeId>, NUM_SIDES> from_opin_edge_map;
876+
std::array<std::map<size_t, RREdgeId>, NUM_2D_SIDES> from_opin_edge_map;
877877

878878
e_side chan_side = get_cb_chan_side(ipin_side);
879879

@@ -944,13 +944,13 @@ void RRGSB::sort_ipin_node_in_edges(const RRGraphView& rr_graph,
944944
if (OPIN != rr_graph.node_type(src_node)) {
945945
continue;
946946
}
947-
enum e_side cb_opin_side = NUM_SIDES;
947+
enum e_side cb_opin_side = NUM_2D_SIDES;
948948
int cb_opin_index = -1;
949949
get_node_side_and_index(rr_graph, src_node, IN_PORT, cb_opin_side,
950950
cb_opin_index);
951-
VTR_ASSERT((-1 != cb_opin_index) && (NUM_SIDES != cb_opin_side));
951+
VTR_ASSERT((-1 != cb_opin_index) && (NUM_2D_SIDES != cb_opin_side));
952952
/* Must have valid side and index */
953-
if (OPEN == cb_opin_index || NUM_SIDES == cb_opin_side) {
953+
if (OPEN == cb_opin_index || NUM_2D_SIDES == cb_opin_side) {
954954
VTR_LOG("GSB[%lu][%lu]:\n", get_x(), get_y());
955955
VTR_LOG("----------------------------------\n");
956956
VTR_LOG("SRC node:\n");
@@ -1021,11 +1021,11 @@ void RRGSB::build_cb_opin_nodes(const RRGraphView& rr_graph) {
10211021
if (OPIN != rr_graph.node_type(cand_node)) {
10221022
continue;
10231023
}
1024-
enum e_side cb_opin_side = NUM_SIDES;
1024+
enum e_side cb_opin_side = NUM_2D_SIDES;
10251025
int cb_opin_index = -1;
10261026
get_node_side_and_index(rr_graph, cand_node, IN_PORT, cb_opin_side,
10271027
cb_opin_index);
1028-
if ((-1 == cb_opin_index) || (NUM_SIDES == cb_opin_side)) {
1028+
if ((-1 == cb_opin_index) || (NUM_2D_SIDES == cb_opin_side)) {
10291029
VTR_LOG("GSB[%lu][%lu]:\n", get_x(), get_y());
10301030
VTR_LOG("----------------------------------\n");
10311031
VTR_LOG("SRC node:\n");
@@ -1036,7 +1036,7 @@ void RRGSB::build_cb_opin_nodes(const RRGraphView& rr_graph) {
10361036
VTR_LOG("\t%s\n", rr_graph.node_coordinate_to_string(rr_graph.edge_sink_node(temp_edge)).c_str());
10371037
}
10381038
}
1039-
VTR_ASSERT((-1 != cb_opin_index) && (NUM_SIDES != cb_opin_side));
1039+
VTR_ASSERT((-1 != cb_opin_index) && (NUM_2D_SIDES != cb_opin_side));
10401040

10411041
if (cb_opin_node_[icb_type][size_t(cb_opin_side)].end() ==
10421042
std::find(cb_opin_node_[icb_type][size_t(cb_opin_side)].begin(), cb_opin_node_[icb_type][size_t(cb_opin_side)].end(), cand_node)) {

‎vpr/src/tileable_rr_graph/rr_gsb.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -268,7 +268,7 @@ class RRGSB {
268268
* CBX -> array[0], CBY -> array[1]
269269
* Each CB may have OPINs from all sides
270270
*/
271-
std::array<std::array<std::vector<RRNodeId>, NUM_SIDES>, 2> cb_opin_node_;
271+
std::array<std::array<std::vector<RRNodeId>, NUM_2D_SIDES>, 2> cb_opin_node_;
272272
};
273273

274274
#endif

‎vpr/src/tileable_rr_graph/tileable_rr_graph_edge_builder.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -79,7 +79,7 @@ void build_rr_graph_edges_for_sink_nodes(const RRGraphView& rr_graph,
7979
const RRNodeId& sink_node = rr_graph.node_lookup().find_node(layer,
8080
xlow - grids.get_width_offset(tile_loc),
8181
ylow - grids.get_height_offset(tile_loc),
82-
SINK, sink_node_class_num, SIDES[0]);
82+
SINK, sink_node_class_num, TOTAL_2D_SIDES[0]);
8383
VTR_ASSERT(true == rr_graph.valid_node(sink_node));
8484

8585
/* add edges to connect the IPIN node to SINK nodes */

‎vpr/src/tileable_rr_graph/tileable_rr_graph_gsb.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -646,7 +646,7 @@ RRGSB build_one_tileable_rr_gsb(const DeviceGrid& grids,
646646
vtr::Point<size_t> coordinate = rr_gsb.get_side_block_coordinate(side_manager.get_side());
647647
RRChan rr_chan;
648648
std::vector<std::vector<RRNodeId>> temp_opin_rr_nodes(2);
649-
enum e_side opin_grid_side[2] = {NUM_SIDES, NUM_SIDES};
649+
enum e_side opin_grid_side[2] = {NUM_2D_SIDES, NUM_2D_SIDES};
650650
enum PORTS chan_dir_to_port_dir_mapping[2] = {OUT_PORT, IN_PORT}; /* 0: INC_DIRECTION => ?; 1: DEC_DIRECTION => ? */
651651

652652
/* Build a segment details, where we need the segment ids for building rr_chan
@@ -817,8 +817,8 @@ RRGSB build_one_tileable_rr_gsb(const DeviceGrid& grids,
817817
/* Clear the temp data */
818818
temp_opin_rr_nodes[0].clear();
819819
temp_opin_rr_nodes[1].clear();
820-
opin_grid_side[0] = NUM_SIDES;
821-
opin_grid_side[1] = NUM_SIDES;
820+
opin_grid_side[0] = NUM_2D_SIDES;
821+
opin_grid_side[1] = NUM_2D_SIDES;
822822
}
823823

824824
/* Add IPIN nodes from adjacent grids: the 4 grids sitting on the 4 corners of the Switch Block

‎vpr/src/tileable_rr_graph/tileable_rr_graph_node_builder.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -730,12 +730,12 @@ static void load_grid_nodes_basic_info(RRGraphBuilder& rr_graph_builder,
730730
vtr::Point<int>(root_x, root_y),
731731
vtr::Point<int>(x, y),
732732
SOURCE,
733-
SIDES[0]);
733+
TOTAL_2D_SIDES[0]);
734734
rr_graph_builder.node_lookup().mirror_nodes(0,
735735
vtr::Point<int>(root_x, root_y),
736736
vtr::Point<int>(x, y),
737737
SINK,
738-
SIDES[0]);
738+
TOTAL_2D_SIDES[0]);
739739
}
740740
}
741741
}
@@ -1195,9 +1195,9 @@ void create_tileable_rr_graph_nodes(const RRGraphView& rr_graph,
11951195
* When comment the following block out, you will see errors */
11961196
for (t_rr_type rr_type : RR_TYPES) {
11971197
if (rr_type == CHANX) {
1198-
rr_graph_builder.node_lookup().resize_nodes(layer, grids.height(), grids.width(), rr_type, NUM_SIDES);
1198+
rr_graph_builder.node_lookup().resize_nodes(layer, grids.height(), grids.width(), rr_type, NUM_2D_SIDES);
11991199
} else {
1200-
rr_graph_builder.node_lookup().resize_nodes(layer, grids.width(), grids.height(), rr_type, NUM_SIDES);
1200+
rr_graph_builder.node_lookup().resize_nodes(layer, grids.width(), grids.height(), rr_type, NUM_2D_SIDES);
12011201
}
12021202
}
12031203

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