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Odin: update expectation
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2 files changed

+105
-6
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2 files changed

+105
-6
lines changed

‎ODIN_II/regression_test/benchmark/task/keywords/defparam/simulation_result.json

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@@ -57,6 +57,49 @@
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"Estimated LUTs": 1,
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"Total Node": 3
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},
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"defparam/defparam_depth_1/no_arch": {
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"test_name": "defparam/defparam_depth_1/no_arch",
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"blif": "defparam_depth_1.blif",
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"max_rss(MiB)": 30,
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"exec_time(ms)": 5.1,
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"simulation_time(ms)": 1.7,
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"test_coverage(%)": 100,
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"Pi": 10,
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"Po": 10,
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"logic element": 10,
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"Longest Path": 3,
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"Average Path": 3,
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"Estimated LUTs": 10,
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"Total Node": 10
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},
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"defparam/defparam_depth_1_failure/no_arch": {
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"test_name": "defparam/defparam_depth_1_failure/no_arch",
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"blif": "defparam_depth_1_failure.blif",
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"max_rss(MiB)": 30,
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"exec_time(ms)": 4.8,
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"simulation_time(ms)": 1.5,
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"test_coverage(%)": 100,
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"Pi": 5,
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"Po": 5,
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"logic element": 5,
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"Longest Path": 3,
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"Average Path": 3,
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"Estimated LUTs": 5,
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"Total Node": 5
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},
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"defparam/defparam_simple_failure/no_arch": {
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"test_name": "defparam/defparam_simple_failure/no_arch",
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"blif": "defparam_simple_failure.blif",
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"max_rss(MiB)": 29.1,
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"exec_time(ms)": 2.1,
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"Pi": 3,
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"Po": 3,
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"logic element": 3,
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"Longest Path": 3,
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"Average Path": 3,
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"Estimated LUTs": 3,
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"Total Node": 3
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},
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"DEFAULT": {
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"test_name": "n/a",
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"architecture": "n/a",

‎ODIN_II/regression_test/benchmark/task/keywords/defparam/synthesis_result.json

Lines changed: 62 additions & 6 deletions
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@@ -5,17 +5,13 @@
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"warnings": [
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"AST defparam_failure.v:30 there are no ports for the module (params)",
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"NETLIST defparam_failure.v:8 This output is undriven (simple_op^out2~3) and will be removed",
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"NETLIST defparam_failure.v:8 This output is undriven (simple_op^out2~4) and will be removed",
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"NETLIST defparam_failure.v:8 This output is undriven (simple_op^out2~5) and will be removed",
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"NETLIST defparam_failure.v:8 Net simple_op^out2~3 driving node simple_op^out2~3 is itself undriven.",
11-
"NETLIST defparam_failure.v:8 Net simple_op^out2~4 driving node simple_op^out2~4 is itself undriven.",
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"NETLIST defparam_failure.v:8 Net simple_op^out2~5 driving node simple_op^out2~5 is itself undriven."
8+
"NETLIST defparam_failure.v:8 Net simple_op^out2~3 driving node simple_op^out2~3 is itself undriven."
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],
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"max_rss(MiB)": 13.8,
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"exec_time(ms)": 6.2,
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"synthesis_time(ms)": 4.5,
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"Pi": 6,
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"Po": 9,
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"Po": 7,
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"Longest Path": 2,
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"Average Path": 2
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},
@@ -51,6 +47,66 @@
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"Average Path": 3,
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"Total Node": 2
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},
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"defparam/defparam_depth_1/no_arch": {
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"test_name": "defparam/defparam_depth_1/no_arch",
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"verilog": "defparam_depth_1.v",
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"max_rss(MiB)": 32.7,
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"exec_time(ms)": 6.2,
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"synthesis_time(ms)": 4,
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"Pi": 10,
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"Po": 10,
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"Longest Path": 2,
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"Average Path": 2
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},
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"defparam/defparam_depth_1_failure/no_arch": {
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"test_name": "defparam/defparam_depth_1_failure/no_arch",
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"verilog": "defparam_depth_1_failure.v",
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"warnings": [
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"AST defparam_depth_1_failure.v:13 Defparam can only override parameters: width",
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"AST defparam_depth_1_failure.v:14 Defparam can only override parameters: width",
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"NETLIST defparam_depth_1_failure.v:8 This output is undriven (simple_op^out2~3) and will be removed",
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"NETLIST defparam_depth_1_failure.v:8 This output is undriven (simple_op^out2~4) and will be removed",
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"NETLIST defparam_depth_1_failure.v:8 This output is undriven (simple_op^out2~5) and will be removed",
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"NETLIST defparam_depth_1_failure.v:8 This output is undriven (simple_op^out2~6) and will be removed",
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"NETLIST defparam_depth_1_failure.v:8 This output is undriven (simple_op^out2~7) and will be removed",
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"NETLIST defparam_depth_1_failure.v:8 Net simple_op^out2~3 driving node simple_op^out2~3 is itself undriven.",
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"NETLIST defparam_depth_1_failure.v:8 Net simple_op^out2~4 driving node simple_op^out2~4 is itself undriven.",
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"NETLIST defparam_depth_1_failure.v:8 Net simple_op^out2~5 driving node simple_op^out2~5 is itself undriven.",
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"NETLIST defparam_depth_1_failure.v:8 Net simple_op^out2~6 driving node simple_op^out2~6 is itself undriven.",
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"NETLIST defparam_depth_1_failure.v:8 Net simple_op^out2~7 driving node simple_op^out2~7 is itself undriven."
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],
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"max_rss(MiB)": 33,
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"exec_time(ms)": 6.4,
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"synthesis_time(ms)": 4.2,
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"Pi": 5,
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"Po": 10,
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"Longest Path": 2,
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"Average Path": 2
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},
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"defparam/defparam_depth_2/no_arch": {
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"test_name": "defparam/defparam_depth_2/no_arch",
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"verilog": "defparam_depth_2.v",
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"exit": 134,
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"errors": [
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"NETLIST defparam_depth_2.v:16 This module port simple_op.m2^in~2 is unused in module assg1"
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]
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},
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"defparam/defparam_simple_failure/no_arch": {
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"test_name": "defparam/defparam_simple_failure/no_arch",
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"verilog": "defparam_simple_failure.v",
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"warnings": [
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"AST defparam_simple_failure.v:23 there are no ports for the module (params)",
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"NETLIST defparam_simple_failure.v:5 This output is undriven (simple_op^out1~3) and will be removed",
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"NETLIST defparam_simple_failure.v:5 Net simple_op^out1~3 driving node simple_op^out1~3 is itself undriven."
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],
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"max_rss(MiB)": 32.7,
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"exec_time(ms)": 5.6,
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"synthesis_time(ms)": 3.1,
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"Pi": 3,
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"Po": 4,
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"Longest Path": 2,
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"Average Path": 2
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},
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"DEFAULT": {
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"test_name": "n/a",
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"architecture": "n/a",

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