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vaughnbetzvaughnbetz
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Merge pull request #1816 from ethanroj23/rr_graph_node_R_C
RRGraphView node_R(), node_C(), node_rc_index() Implementation
2 parents 1a00ea9 + 849b618 commit 29a9fd5

20 files changed

+65
-67
lines changed

‎utils/route_diag/src/main.cpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -102,6 +102,7 @@ static void do_one_route(int source_node, int sink_node,
102102
device_ctx.grid,
103103
*router_lookahead,
104104
device_ctx.rr_nodes,
105+
&device_ctx.rr_graph,
105106
device_ctx.rr_rc_data,
106107
device_ctx.rr_switch_inf,
107108
g_vpr_ctx.mutable_routing().rr_node_route_inf);

‎vpr/src/device/rr_graph_obj.cpp

Lines changed: 0 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -168,18 +168,6 @@ e_side RRGraph::node_side(const RRNodeId& node) const {
168168
return node_sides_[node];
169169
}
170170

171-
/* Get the resistance of a node */
172-
float RRGraph::node_R(const RRNodeId& node) const {
173-
VTR_ASSERT_SAFE(valid_node_id(node));
174-
return node_Rs_[node];
175-
}
176-
177-
/* Get the capacitance of a node */
178-
float RRGraph::node_C(const RRNodeId& node) const {
179-
VTR_ASSERT_SAFE(valid_node_id(node));
180-
return node_Cs_[node];
181-
}
182-
183171
/*
184172
* Get a segment id of a node in rr_graph
185173
*/

‎vpr/src/device/rr_graph_obj.h

Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -434,12 +434,6 @@ class RRGraph {
434434
*/
435435
e_side node_side(const RRNodeId& node) const;
436436

437-
/* Get resistance of a node, used to built RC tree for timing analysis */
438-
float node_R(const RRNodeId& node) const;
439-
440-
/* Get capacitance of a node, used to built RC tree for timing analysis */
441-
float node_C(const RRNodeId& node) const;
442-
443437
/* Get segment id of a node, containing the information of the routing
444438
* segment that the node represents. See more details in the data structure t_segment_inf
445439
*/

‎vpr/src/device/rr_graph_view.h

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -77,6 +77,21 @@ class RRGraphView {
7777
return node_storage_.node_direction_string(node);
7878
}
7979

80+
/* Get the capacitance of a routing resource node. This function is inlined for runtime optimization. */
81+
inline float node_C(RRNodeId node) const {
82+
return node_storage_.node_C(node);
83+
}
84+
85+
/* Get the resistance of a routing resource node. This function is inlined for runtime optimization. */
86+
inline float node_R(RRNodeId node) const {
87+
return node_storage_.node_R(node);
88+
}
89+
90+
/* Get the rc_index of a routing resource node. This function is inlined for runtime optimization. */
91+
inline int16_t node_rc_index(RRNodeId node) const {
92+
return node_storage_.node_rc_index(node);
93+
}
94+
8095
/* Get the fan in of a routing resource node. This function is inlined for runtime optimization. */
8196
inline t_edge_size node_fan_in(RRNodeId node) const {
8297
return node_storage_.fan_in(node);

‎vpr/src/route/check_rr_graph.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -510,8 +510,8 @@ void check_rr_node(int inode, enum e_route_type route_type, const DeviceContext&
510510
}
511511

512512
/* Check that the capacitance and resistance are reasonable. */
513-
C = device_ctx.rr_nodes[inode].C();
514-
R = device_ctx.rr_nodes[inode].R();
513+
C = rr_graph.node_C(RRNodeId(inode));
514+
R = rr_graph.node_R(RRNodeId(inode));
515515

516516
if (rr_type == CHANX || rr_type == CHANY) {
517517
if (C < 0. || R < 0.) {

‎vpr/src/route/connection_router.cpp

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -686,12 +686,12 @@ void ConnectionRouter<Heap>::evaluate_timing_driven_node_costs(t_heap* to,
686686
float switch_Cinternal = rr_switch_inf_[iswitch].Cinternal;
687687

688688
//To node info
689-
auto rc_index = rr_nodes_.node_rc_index(RRNodeId(to_node));
689+
auto rc_index = rr_graph_->node_rc_index(RRNodeId(to_node));
690690
float node_C = rr_rc_data_[rc_index].C;
691691
float node_R = rr_rc_data_[rc_index].R;
692692

693693
//From node info
694-
float from_node_R = rr_rc_data_[rr_nodes_.node_rc_index(RRNodeId(from_node))].R;
694+
float from_node_R = rr_rc_data_[rr_graph_->node_rc_index(RRNodeId(from_node))].R;
695695

696696
//Update R_upstream
697697
if (switch_buffered) {
@@ -967,6 +967,7 @@ std::unique_ptr<ConnectionRouterInterface> make_connection_router(
967967
const DeviceGrid& grid,
968968
const RouterLookahead& router_lookahead,
969969
const t_rr_graph_storage& rr_nodes,
970+
const RRGraphView* rr_graph,
970971
const std::vector<t_rr_rc_data>& rr_rc_data,
971972
const std::vector<t_rr_switch_inf>& rr_switch_inf,
972973
std::vector<t_rr_node_route_inf>& rr_node_route_inf) {
@@ -976,6 +977,7 @@ std::unique_ptr<ConnectionRouterInterface> make_connection_router(
976977
grid,
977978
router_lookahead,
978979
rr_nodes,
980+
rr_graph,
979981
rr_rc_data,
980982
rr_switch_inf,
981983
rr_node_route_inf);
@@ -984,6 +986,7 @@ std::unique_ptr<ConnectionRouterInterface> make_connection_router(
984986
grid,
985987
router_lookahead,
986988
rr_nodes,
989+
rr_graph,
987990
rr_rc_data,
988991
rr_switch_inf,
989992
rr_node_route_inf);

‎vpr/src/route/connection_router.h

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -28,12 +28,14 @@ class ConnectionRouter : public ConnectionRouterInterface {
2828
const DeviceGrid& grid,
2929
const RouterLookahead& router_lookahead,
3030
const t_rr_graph_storage& rr_nodes,
31+
const RRGraphView* rr_graph,
3132
const std::vector<t_rr_rc_data>& rr_rc_data,
3233
const std::vector<t_rr_switch_inf>& rr_switch_inf,
3334
std::vector<t_rr_node_route_inf>& rr_node_route_inf)
3435
: grid_(grid)
3536
, router_lookahead_(router_lookahead)
3637
, rr_nodes_(rr_nodes.view())
38+
, rr_graph_(rr_graph)
3739
, rr_rc_data_(rr_rc_data.data(), rr_rc_data.size())
3840
, rr_switch_inf_(rr_switch_inf.data(), rr_switch_inf.size())
3941
, rr_node_route_inf_(rr_node_route_inf.data(), rr_node_route_inf.size())
@@ -246,6 +248,7 @@ class ConnectionRouter : public ConnectionRouterInterface {
246248
const DeviceGrid& grid_;
247249
const RouterLookahead& router_lookahead_;
248250
const t_rr_graph_view rr_nodes_;
251+
const RRGraphView* rr_graph_;
249252
vtr::array_view<const t_rr_rc_data> rr_rc_data_;
250253
vtr::array_view<const t_rr_switch_inf> rr_switch_inf_;
251254
vtr::array_view<t_rr_node_route_inf> rr_node_route_inf_;
@@ -264,6 +267,7 @@ std::unique_ptr<ConnectionRouterInterface> make_connection_router(
264267
const DeviceGrid& grid,
265268
const RouterLookahead& router_lookahead,
266269
const t_rr_graph_storage& rr_nodes,
270+
const RRGraphView* rr_graph,
267271
const std::vector<t_rr_rc_data>& rr_rc_data,
268272
const std::vector<t_rr_switch_inf>& rr_switch_inf,
269273
std::vector<t_rr_node_route_inf>& rr_node_route_inf);

‎vpr/src/route/overuse_report.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -203,8 +203,8 @@ static void report_overused_chanx_chany(std::ostream& os, RRNodeId node_id) {
203203
os << "Yhigh = " << device_ctx.rr_nodes.node_yhigh(node_id) << '\n';
204204

205205
//Print out associated RC characteristics as they will be non-zero
206-
os << "Resistance = " << device_ctx.rr_nodes.node_R(node_id) << '\n';
207-
os << "Capacitance = " << device_ctx.rr_nodes.node_C(node_id) << '\n';
206+
os << "Resistance = " << rr_graph.node_R(node_id) << '\n';
207+
os << "Capacitance = " << rr_graph.node_C(node_id) << '\n';
208208
}
209209

210210
///@brief Print out information specific to SOURCE/SINK type rr nodes

‎vpr/src/route/route_timing.cpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -340,6 +340,7 @@ bool try_timing_driven_route_tmpl(const t_router_opts& router_opts,
340340
device_ctx.grid,
341341
*router_lookahead,
342342
device_ctx.rr_nodes,
343+
&device_ctx.rr_graph,
343344
device_ctx.rr_rc_data,
344345
device_ctx.rr_switch_inf,
345346
route_ctx.rr_node_route_inf);

‎vpr/src/route/route_tree_timing.cpp

Lines changed: 19 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -184,6 +184,7 @@ t_rt_node* init_route_tree_to_source(ClusterNetId inet) {
184184

185185
auto& route_ctx = g_vpr_ctx.routing();
186186
auto& device_ctx = g_vpr_ctx.device();
187+
const auto& rr_graph = device_ctx.rr_graph;
187188

188189
rt_root = alloc_rt_node();
189190
rt_root->u.child_list = nullptr;
@@ -195,9 +196,9 @@ t_rt_node* init_route_tree_to_source(ClusterNetId inet) {
195196

196197
rt_root->inode = inode;
197198
rt_root->net_pin_index = OPEN;
198-
rt_root->C_downstream = device_ctx.rr_nodes[inode].C();
199-
rt_root->R_upstream = device_ctx.rr_nodes[inode].R();
200-
rt_root->Tdel = 0.5 * device_ctx.rr_nodes[inode].R() * device_ctx.rr_nodes[inode].C();
199+
rt_root->C_downstream = rr_graph.node_C(RRNodeId(inode));
200+
rt_root->R_upstream = rr_graph.node_R(RRNodeId(inode));
201+
rt_root->Tdel = 0.5 * rr_graph.node_R(RRNodeId(inode)) * rr_graph.node_C(RRNodeId(inode));
201202
rr_node_to_rt_node[inode] = rt_root;
202203

203204
return (rt_root);
@@ -457,6 +458,7 @@ void load_new_subtree_R_upstream(t_rt_node* rt_node) {
457458
}
458459

459460
auto& device_ctx = g_vpr_ctx.device();
461+
const auto& rr_graph = device_ctx.rr_graph;
460462

461463
t_rt_node* parent_rt_node = rt_node->parent_node;
462464
int inode = rt_node->inode;
@@ -472,7 +474,7 @@ void load_new_subtree_R_upstream(t_rt_node* rt_node) {
472474
}
473475
R_upstream += device_ctx.rr_switch_inf[iswitch].R; //Parent switch R
474476
}
475-
R_upstream += device_ctx.rr_nodes[inode].R(); //Current node R
477+
R_upstream += rr_graph.node_R(RRNodeId(inode)); //Current node R
476478

477479
rt_node->R_upstream = R_upstream;
478480

@@ -487,7 +489,8 @@ float load_new_subtree_C_downstream(t_rt_node* rt_node) {
487489

488490
if (rt_node) {
489491
auto& device_ctx = g_vpr_ctx.device();
490-
C_downstream += device_ctx.rr_nodes[rt_node->inode].C();
492+
const auto& rr_graph = device_ctx.rr_graph;
493+
C_downstream += rr_graph.node_C(RRNodeId(rt_node->inode));
491494
for (t_linked_rt_edge* edge = rt_node->u.child_list; edge != nullptr; edge = edge->next) {
492495
/*Similar to net_delay.cpp, this for loop traverses a rc subtree, whose edges represent enabled switches.
493496
* When switches such as multiplexers and tristate buffers are enabled, their fanout
@@ -573,13 +576,14 @@ void load_route_tree_Tdel(t_rt_node* subtree_rt_root, float Tarrival) {
573576
float Tdel, Tchild;
574577

575578
auto& device_ctx = g_vpr_ctx.device();
579+
const auto& rr_graph = device_ctx.rr_graph;
576580

577581
inode = subtree_rt_root->inode;
578582

579583
/* Assuming the downstream connections are, on average, connected halfway
580584
* along a wire segment's length. See discussion in net_delay.c if you want
581585
* to change this. */
582-
Tdel = Tarrival + 0.5 * subtree_rt_root->C_downstream * device_ctx.rr_nodes[inode].R();
586+
Tdel = Tarrival + 0.5 * subtree_rt_root->C_downstream * rr_graph.node_R(RRNodeId(inode));
583587
subtree_rt_root->Tdel = Tdel;
584588

585589
/* Now expand the children of this node to load their Tdel values (depth-
@@ -1373,20 +1377,20 @@ bool is_valid_route_tree(const t_rt_node* root) {
13731377
short iswitch = root->parent_switch;
13741378
if (root->parent_node) {
13751379
if (device_ctx.rr_switch_inf[iswitch].buffered()) {
1376-
float R_upstream_check = device_ctx.rr_nodes[inode].R() + device_ctx.rr_switch_inf[iswitch].R;
1380+
float R_upstream_check = rr_graph.node_R(RRNodeId(inode)) + device_ctx.rr_switch_inf[iswitch].R;
13771381
if (!vtr::isclose(root->R_upstream, R_upstream_check, RES_REL_TOL, RES_ABS_TOL)) {
13781382
VTR_LOG("%d mismatch R upstream %e supposed %e\n", inode, root->R_upstream, R_upstream_check);
13791383
return false;
13801384
}
13811385
} else {
1382-
float R_upstream_check = device_ctx.rr_nodes[inode].R() + root->parent_node->R_upstream + device_ctx.rr_switch_inf[iswitch].R;
1386+
float R_upstream_check = rr_graph.node_R(RRNodeId(inode)) + root->parent_node->R_upstream + device_ctx.rr_switch_inf[iswitch].R;
13831387
if (!vtr::isclose(root->R_upstream, R_upstream_check, RES_REL_TOL, RES_ABS_TOL)) {
13841388
VTR_LOG("%d mismatch R upstream %e supposed %e\n", inode, root->R_upstream, R_upstream_check);
13851389
return false;
13861390
}
13871391
}
1388-
} else if (root->R_upstream != device_ctx.rr_nodes[inode].R()) {
1389-
VTR_LOG("%d mismatch R upstream %e supposed %e\n", inode, root->R_upstream, device_ctx.rr_nodes[inode].R());
1392+
} else if (root->R_upstream != rr_graph.node_R(RRNodeId(inode))) {
1393+
VTR_LOG("%d mismatch R upstream %e supposed %e\n", inode, root->R_upstream, rr_graph.node_R(RRNodeId(inode)));
13901394
return false;
13911395
}
13921396

@@ -1427,7 +1431,7 @@ bool is_valid_route_tree(const t_rt_node* root) {
14271431
}
14281432
edge = edge->next;
14291433
}
1430-
float C_downstream_check = C_downstream_children + device_ctx.rr_nodes[inode].C();
1434+
float C_downstream_check = C_downstream_children + rr_graph.node_C(RRNodeId(inode));
14311435
if (!vtr::isclose(root->C_downstream, C_downstream_check, CAP_REL_TOL, CAP_ABS_TOL)) {
14321436
VTR_LOG("%d mismatch C downstream %e supposed %e\n", inode, root->C_downstream, C_downstream_check);
14331437
return false;
@@ -1467,6 +1471,7 @@ init_route_tree_to_source_no_net(int inode) {
14671471
t_rt_node* rt_root;
14681472

14691473
auto& device_ctx = g_vpr_ctx.device();
1474+
const auto& rr_graph = device_ctx.rr_graph;
14701475

14711476
rt_root = alloc_rt_node();
14721477
rt_root->u.child_list = nullptr;
@@ -1475,9 +1480,9 @@ init_route_tree_to_source_no_net(int inode) {
14751480
rt_root->re_expand = true;
14761481
rt_root->inode = inode;
14771482
rt_root->net_pin_index = OPEN;
1478-
rt_root->C_downstream = device_ctx.rr_nodes[inode].C();
1479-
rt_root->R_upstream = device_ctx.rr_nodes[inode].R();
1480-
rt_root->Tdel = 0.5 * device_ctx.rr_nodes[inode].R() * device_ctx.rr_nodes[inode].C();
1483+
rt_root->C_downstream = rr_graph.node_C(RRNodeId(inode));
1484+
rt_root->R_upstream = rr_graph.node_R(RRNodeId(inode));
1485+
rt_root->Tdel = 0.5 * rr_graph.node_R(RRNodeId(inode)) * rr_graph.node_C(RRNodeId(inode));
14811486
rr_node_to_rt_node[inode] = rt_root;
14821487

14831488
return (rt_root);

‎vpr/src/route/router_delay_profiling.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -17,6 +17,7 @@ RouterDelayProfiler::RouterDelayProfiler(
1717
g_vpr_ctx.device().grid,
1818
*lookahead,
1919
g_vpr_ctx.device().rr_nodes,
20+
&g_vpr_ctx.device().rr_graph,
2021
g_vpr_ctx.device().rr_rc_data,
2122
g_vpr_ctx.device().rr_switch_inf,
2223
g_vpr_ctx.mutable_routing().rr_node_route_inf) {}
@@ -121,6 +122,7 @@ std::vector<float> calculate_all_path_delays_from_rr_node(int src_rr_node, const
121122
device_ctx.grid,
122123
*router_lookahead,
123124
device_ctx.rr_nodes,
125+
&g_vpr_ctx.device().rr_graph,
124126
device_ctx.rr_rc_data,
125127
device_ctx.rr_switch_inf,
126128
routing_ctx.rr_node_route_inf);

‎vpr/src/route/router_lookahead_map.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -151,7 +151,7 @@ class PQ_Entry {
151151
this->R_upstream = parent_R_upstream;
152152
if (!starting_node) {
153153
int cost_index = device_ctx.rr_nodes.node_cost_index(RRNodeId(set_rr_node));
154-
//this->delay += g_rr_nodes[set_rr_node].C() * (g_rr_switch_inf[switch_ind].R + 0.5*g_rr_nodes[set_rr_node].R()) +
154+
//this->delay += rr_graph.node_C(RRNodeId(set_rr_node)) * (g_rr_switch_inf[switch_ind].R + 0.5*rr_graph.node_R(RRNodeId(set_rr_node))) +
155155
// g_rr_switch_inf[switch_ind].Tdel;
156156

157157
//FIXME going to use the delay data that the VPR7 lookahead uses. For some reason the delay calculation above calculates

‎vpr/src/route/router_lookahead_map_utils.cpp

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -70,6 +70,7 @@ PQ_Entry::PQ_Entry(
7070
this->rr_node = set_rr_node;
7171

7272
auto& device_ctx = g_vpr_ctx.device();
73+
const auto& rr_graph = device_ctx.rr_graph;
7374
this->delay = parent_delay;
7475
this->congestion_upstream = parent_congestion_upstream;
7576
this->R_upstream = parent_R_upstream;
@@ -78,8 +79,8 @@ PQ_Entry::PQ_Entry(
7879
Tsw += Tsw_adjust;
7980
VTR_ASSERT(Tsw >= 0.f);
8081
float Rsw = device_ctx.rr_switch_inf[switch_ind].R;
81-
float Cnode = device_ctx.rr_nodes[size_t(set_rr_node)].C();
82-
float Rnode = device_ctx.rr_nodes[size_t(set_rr_node)].R();
82+
float Cnode = rr_graph.node_C(set_rr_node);
83+
float Rnode = rr_graph.node_R(set_rr_node);
8384

8485
float T_linear = 0.f;
8586
if (device_ctx.rr_switch_inf[switch_ind].buffered()) {
@@ -112,10 +113,11 @@ util::PQ_Entry_Delay::PQ_Entry_Delay(
112113

113114
if (parent != nullptr) {
114115
auto& device_ctx = g_vpr_ctx.device();
116+
const auto& rr_graph = device_ctx.rr_graph;
115117
float Tsw = device_ctx.rr_switch_inf[switch_ind].Tdel;
116118
float Rsw = device_ctx.rr_switch_inf[switch_ind].R;
117-
float Cnode = device_ctx.rr_nodes[size_t(set_rr_node)].C();
118-
float Rnode = device_ctx.rr_nodes[size_t(set_rr_node)].R();
119+
float Cnode = rr_graph.node_C(set_rr_node);
120+
float Rnode = rr_graph.node_R(set_rr_node);
119121

120122
float T_linear = 0.f;
121123
if (device_ctx.rr_switch_inf[switch_ind].buffered()) {

‎vpr/src/route/rr_graph_indexed_data.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -367,8 +367,8 @@ static void load_rr_indexed_data_T_values() {
367367
VTR_ASSERT(num_switches > 0);
368368

369369
num_nodes_of_index[cost_index]++;
370-
C_total[cost_index].push_back(rr_nodes[inode].C());
371-
R_total[cost_index].push_back(rr_nodes[inode].R());
370+
C_total[cost_index].push_back(rr_graph.node_C(RRNodeId(inode)));
371+
R_total[cost_index].push_back(rr_graph.node_R(RRNodeId(inode)));
372372

373373
switch_R_total[cost_index].push_back(avg_switch_R);
374374
switch_T_total[cost_index].push_back(avg_switch_T);

‎vpr/src/route/rr_graph_timing_params.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -49,7 +49,7 @@ void add_rr_graph_C_from_switches(float C_ipin_cblock) {
4949

5050
for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); inode++) {
5151
//The C may have already been partly initialized (e.g. with metal capacitance)
52-
rr_node_C[inode] += device_ctx.rr_nodes[inode].C();
52+
rr_node_C[inode] += rr_graph.node_C(RRNodeId(inode));
5353

5454
from_rr_type = rr_graph.node_type(RRNodeId(inode));
5555

@@ -191,7 +191,7 @@ void add_rr_graph_C_from_switches(float C_ipin_cblock) {
191191

192192
//Create the final flywieghted t_rr_rc_data
193193
for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); inode++) {
194-
mutable_device_ctx.rr_nodes[inode].set_rc_index(find_create_rr_rc_data(device_ctx.rr_nodes[inode].R(), rr_node_C[inode]));
194+
mutable_device_ctx.rr_nodes[inode].set_rc_index(find_create_rr_rc_data(rr_graph.node_R(RRNodeId(inode)), rr_node_C[inode]));
195195
}
196196

197197
free(Couts_to_add);

‎vpr/src/route/rr_graph_uxsdcxx_serializer.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -682,10 +682,10 @@ class RrGraphSerializer final : public uxsd::RrGraphBase<RrGraphContextTypes> {
682682
}
683683

684684
inline float get_node_timing_C(const t_rr_node& node) final {
685-
return node.C();
685+
return rr_graph_->node_C(node.id());
686686
}
687687
inline float get_node_timing_R(const t_rr_node& node) final {
688-
return node.R();
688+
return rr_graph_->node_R(node.id());
689689
}
690690

691691
/** Generated for complex type "node_segment":

‎vpr/src/route/rr_node.cpp

Lines changed: 0 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -28,17 +28,6 @@ bool t_rr_node::edge_is_configurable(t_edge_size iedge) const {
2828
return device_ctx.rr_switch_inf[iswitch].configurable();
2929
}
3030

31-
float t_rr_node::R() const {
32-
auto& device_ctx = g_vpr_ctx.device();
33-
return device_ctx.rr_rc_data[rc_index()].R;
34-
}
35-
36-
float t_rr_node::C() const {
37-
auto& device_ctx = g_vpr_ctx.device();
38-
VTR_ASSERT(rc_index() < (short)device_ctx.rr_rc_data.size());
39-
return device_ctx.rr_rc_data[rc_index()].C;
40-
}
41-
4231
bool t_rr_node::validate() const {
4332
//Check internal assumptions about RR node are valid
4433
t_edge_size iedge = 0;

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