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Merge pull request #1805 from verilog-to-routing/get_rr_node_indices
Deprecate ``get_rr_node_indices()`` functions
2 parents 06317d0 + d7a9ea4 commit 1a00ea9

16 files changed

+221
-416
lines changed

‎utils/route_diag/src/main.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -170,7 +170,7 @@ static void profile_source(int source_rr_node,
170170
for (int sink_ptc : best_sink_ptcs) {
171171
VTR_ASSERT(sink_ptc != OPEN);
172172

173-
int sink_rr_node = get_rr_node_index(device_ctx.rr_node_indices, sink_x, sink_y, SINK, sink_ptc);
173+
int sink_rr_node = size_t(device_ctx.rr_graph.node_lookup().find_node(sink_x, sink_y, SINK, sink_ptc));
174174

175175
if (directconnect_exists(source_rr_node, sink_rr_node)) {
176176
//Skip if we shouldn't measure direct connects and a direct connect exists

‎vpr/src/device/rr_graph_builder.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -38,6 +38,8 @@ class RRGraphBuilder {
3838
/* Return a writable object for update the fast look-up of rr_node */
3939
RRSpatialLookup& node_lookup();
4040
/* Add an existing rr_node in the node storage to the node look-up
41+
* The node will be added to the lookup for every side it is on (for OPINs and IPINs)
42+
* and for every (x,y) location at which it exists (for wires that span more than one (x,y)).
4143
* This function requires a valid node which has already been allocated in the node storage, with
4244
* - a valid node id
4345
* - valid geometry information: xlow/ylow/xhigh/yhigh

‎vpr/src/device/rr_spatial_lookup.cpp

Lines changed: 51 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -122,6 +122,15 @@ std::vector<RRNodeId> RRSpatialLookup::find_nodes(int x,
122122
return nodes;
123123
}
124124

125+
/* Reserve space to avoid memory fragmentation */
126+
size_t num_nodes = 0;
127+
for (const auto& node : rr_node_indices_[type][node_x][node_y][side]) {
128+
if (RRNodeId(node)) {
129+
num_nodes++;
130+
}
131+
}
132+
133+
nodes.reserve(num_nodes);
125134
for (const auto& node : rr_node_indices_[type][node_x][node_y][side]) {
126135
if (RRNodeId(node)) {
127136
nodes.push_back(RRNodeId(node));
@@ -142,11 +151,6 @@ std::vector<RRNodeId> RRSpatialLookup::find_channel_nodes(int x,
142151
return find_nodes(x, y, type);
143152
}
144153

145-
std::vector<RRNodeId> RRSpatialLookup::find_sink_nodes(int x,
146-
int y) const {
147-
return find_nodes(x, y, SINK);
148-
}
149-
150154
std::vector<RRNodeId> RRSpatialLookup::find_nodes_at_all_sides(int x,
151155
int y,
152156
t_rr_type rr_type,
@@ -155,13 +159,15 @@ std::vector<RRNodeId> RRSpatialLookup::find_nodes_at_all_sides(int x,
155159

156160
/* TODO: Consider to access the raw data like find_node() rather than calling find_node() many times, which hurts runtime */
157161
if (rr_type == IPIN || rr_type == OPIN) {
162+
indices.reserve(NUM_SIDES);
158163
//For pins we need to look at all the sides of the current grid tile
159164
for (e_side side : SIDES) {
160165
RRNodeId rr_node_index = find_node(x, y, rr_type, ptc, side);
161166
if (rr_node_index) {
162167
indices.push_back(rr_node_index);
163168
}
164169
}
170+
indices.shrink_to_fit();
165171
} else {
166172
//Sides do not effect non-pins so there should only be one per ptc
167173
RRNodeId rr_node_index = find_node(x, y, rr_type, ptc);
@@ -173,6 +179,46 @@ std::vector<RRNodeId> RRSpatialLookup::find_nodes_at_all_sides(int x,
173179
return indices;
174180
}
175181

182+
std::vector<RRNodeId> RRSpatialLookup::find_grid_nodes_at_all_sides(int x,
183+
int y,
184+
t_rr_type rr_type) const {
185+
VTR_ASSERT(rr_type == SOURCE || rr_type == OPIN || rr_type == IPIN || rr_type == SINK);
186+
if (rr_type == SOURCE || rr_type == SINK) {
187+
return find_nodes(x, y, rr_type);
188+
}
189+
190+
std::vector<RRNodeId> nodes;
191+
/* Reserve space to avoid memory fragmentation */
192+
size_t num_nodes = 0;
193+
for (e_side node_side : SIDES) {
194+
num_nodes += find_nodes(x, y, rr_type, node_side).size();
195+
}
196+
197+
nodes.reserve(num_nodes);
198+
for (e_side node_side : SIDES) {
199+
std::vector<RRNodeId> temp_nodes = find_nodes(x, y, rr_type, node_side);
200+
nodes.insert(nodes.end(), temp_nodes.begin(), temp_nodes.end());
201+
}
202+
return nodes;
203+
}
204+
205+
void RRSpatialLookup::reserve_nodes(int x,
206+
int y,
207+
t_rr_type type,
208+
int num_nodes,
209+
e_side side) {
210+
VTR_ASSERT_SAFE(3 == rr_node_indices_[type].ndims());
211+
212+
/* For non-IPIN/OPIN nodes, the side should always be the TOP side which follows the convention in find_node() API! */
213+
if (type != IPIN && type != OPIN) {
214+
VTR_ASSERT(side == SIDES[0]);
215+
}
216+
217+
resize_nodes(x, y, type, side);
218+
219+
rr_node_indices_[type][x][y][side].reserve(num_nodes);
220+
}
221+
176222
void RRSpatialLookup::add_node(RRNodeId node,
177223
int x,
178224
int y,

‎vpr/src/device/rr_spatial_lookup.h

Lines changed: 18 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -81,30 +81,35 @@ class RRSpatialLookup {
8181
int y,
8282
t_rr_type type) const;
8383

84-
/**
85-
* Returns the indices of the specified routing resource nodes,
86-
* representing virtual sinks.
87-
* - (x, y) are the coordinate of the sink nodes within the FPGA
88-
*
89-
* Note:
90-
* - Return an empty list if there are no sinks at the given (x, y) location
91-
* - The node list returned only contains valid ids
92-
*/
93-
std::vector<RRNodeId> find_sink_nodes(int x,
94-
int y) const;
95-
9684
/**
9785
* Like find_node() but returns all matching nodes on all the sides.
9886
* This is particularly useful for getting all instances
99-
* of a specific IPIN/OPIN at a specific gird tile (x,y) location.
87+
* of a specific IPIN/OPIN at a specific grid tile (x,y) location.
10088
*/
10189
std::vector<RRNodeId> find_nodes_at_all_sides(int x,
10290
int y,
10391
t_rr_type rr_type,
10492
int ptc) const;
10593

94+
/**
95+
* Returns all matching nodes on all the sides at a specific grid tile (x,y) location.
96+
* As this is applicable to grid pins, the type of nodes are limited to SOURCE/SINK/IPIN/OPIN
97+
*/
98+
std::vector<RRNodeId> find_grid_nodes_at_all_sides(int x,
99+
int y,
100+
t_rr_type rr_type) const;
101+
106102
/* -- Mutators -- */
107103
public:
104+
/**
105+
* Reserve the memory for a list of nodes at (x, y) location with given type and side
106+
*/
107+
void reserve_nodes(int x,
108+
int y,
109+
t_rr_type type,
110+
int num_nodes,
111+
e_side side = SIDES[0]);
112+
108113
/**
109114
* Register a node in the fast look-up
110115
* - You must have a valid node id to register the node in the lookup

‎vpr/src/place/timing_place_lookup.cpp

Lines changed: 11 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -142,8 +142,7 @@ static bool find_direct_connect_sample_locations(const t_direct_inf* direct,
142142
int to_pin,
143143
int to_pin_class,
144144
int* src_rr,
145-
int* sink_rr,
146-
std::vector<RRNodeId>* scratch);
145+
int* sink_rr);
147146

148147
static bool verify_delta_delays(const vtr::Matrix<float>& delta_delays);
149148

@@ -962,8 +961,7 @@ static bool find_direct_connect_sample_locations(const t_direct_inf* direct,
962961
int to_pin,
963962
int to_pin_class,
964963
int* src_rr,
965-
int* sink_rr,
966-
std::vector<RRNodeId>* scratch) {
964+
int* sink_rr) {
967965
VTR_ASSERT(from_type != nullptr);
968966
VTR_ASSERT(to_type != nullptr);
969967

@@ -990,8 +988,7 @@ static bool find_direct_connect_sample_locations(const t_direct_inf* direct,
990988
RRNodeId from_pin_rr = node_lookup.find_node(from_x, from_y, OPIN, from_pin, direct->from_side);
991989
from_pin_found = (from_pin_rr != RRNodeId::INVALID());
992990
} else {
993-
(*scratch) = node_lookup.find_nodes_at_all_sides(from_x, from_y, OPIN, from_pin);
994-
from_pin_found = !(*scratch).empty();
991+
from_pin_found = !(node_lookup.find_nodes_at_all_sides(from_x, from_y, OPIN, from_pin).empty());
995992
}
996993
if (!from_pin_found) continue;
997994

@@ -1007,8 +1004,7 @@ static bool find_direct_connect_sample_locations(const t_direct_inf* direct,
10071004
RRNodeId to_pin_rr = node_lookup.find_node(to_x, to_y, IPIN, to_pin, direct->to_side);
10081005
to_pin_found = (to_pin_rr != RRNodeId::INVALID());
10091006
} else {
1010-
(*scratch) = node_lookup.find_nodes_at_all_sides(to_x, to_y, IPIN, to_pin);
1011-
to_pin_found = !(*scratch).empty();
1007+
to_pin_found = !(node_lookup.find_nodes_at_all_sides(to_x, to_y, IPIN, to_pin).empty());
10121008
}
10131009
if (!to_pin_found) continue;
10141010

@@ -1045,15 +1041,15 @@ static bool find_direct_connect_sample_locations(const t_direct_inf* direct,
10451041
//
10461042

10471043
{
1048-
(*scratch) = node_lookup.find_nodes_at_all_sides(from_x, from_y, SOURCE, from_pin_class);
1049-
VTR_ASSERT((*scratch).size() > 0);
1050-
*src_rr = size_t((*scratch)[0]);
1044+
RRNodeId src_rr_candidate = node_lookup.find_node(from_x, from_y, SOURCE, from_pin_class);
1045+
VTR_ASSERT(src_rr_candidate);
1046+
*src_rr = size_t(src_rr_candidate);
10511047
}
10521048

10531049
{
1054-
(*scratch) = node_lookup.find_nodes_at_all_sides(to_x, to_y, SINK, to_pin_class);
1055-
VTR_ASSERT((*scratch).size() > 0);
1056-
*sink_rr = size_t((*scratch)[0]);
1050+
RRNodeId sink_rr_candidate = node_lookup.find_node(to_x, to_y, SINK, to_pin_class);
1051+
VTR_ASSERT(sink_rr_candidate);
1052+
*sink_rr = size_t(sink_rr_candidate);
10571053
}
10581054

10591055
return true;
@@ -1086,7 +1082,6 @@ void OverrideDelayModel::compute_override_delay_model(
10861082

10871083
//Look at all the direct connections that exist, and add overrides to delay model
10881084
auto& device_ctx = g_vpr_ctx.device();
1089-
std::vector<RRNodeId> scratch;
10901085
for (int idirect = 0; idirect < device_ctx.arch->num_directs; ++idirect) {
10911086
const t_direct_inf* direct = &device_ctx.arch->Directs[idirect];
10921087

@@ -1127,7 +1122,7 @@ void OverrideDelayModel::compute_override_delay_model(
11271122

11281123
int src_rr = OPEN;
11291124
int sink_rr = OPEN;
1130-
bool found_sample_points = find_direct_connect_sample_locations(direct, from_type, from_pin, from_pin_class, to_type, to_pin, to_pin_class, &src_rr, &sink_rr, &scratch);
1125+
bool found_sample_points = find_direct_connect_sample_locations(direct, from_type, from_pin, from_pin_class, to_type, to_pin, to_pin_class, &src_rr, &sink_rr);
11311126

11321127
if (!found_sample_points) {
11331128
++missing_instances;

‎vpr/src/route/clock_connection_builders.cpp

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -74,18 +74,18 @@ void RoutingToClockConnection::create_switches(const ClockRRGraphBuilder& clock_
7474
// Connect to x-channel wires
7575
unsigned num_wires_x = x_wire_indices.size() * fc;
7676
for (size_t i = 0; i < num_wires_x; i++) {
77-
clock_graph.add_edge(rr_edges_to_create, size_t(x_wire_indices[i]), clock_index, arch_switch_idx);
77+
clock_graph.add_edge(rr_edges_to_create, x_wire_indices[i], RRNodeId(clock_index), arch_switch_idx);
7878
}
7979

8080
// Connect to y-channel wires
8181
unsigned num_wires_y = y_wire_indices.size() * fc;
8282
for (size_t i = 0; i < num_wires_y; i++) {
83-
clock_graph.add_edge(rr_edges_to_create, size_t(y_wire_indices[i]), clock_index, arch_switch_idx);
83+
clock_graph.add_edge(rr_edges_to_create, y_wire_indices[i], RRNodeId(clock_index), arch_switch_idx);
8484
}
8585

8686
// Connect to virtual clock sink node
8787
// used by the two stage router
88-
clock_graph.add_edge(rr_edges_to_create, clock_index, size_t(virtual_clock_network_root_idx), arch_switch_idx);
88+
clock_graph.add_edge(rr_edges_to_create, RRNodeId(clock_index), virtual_clock_network_root_idx, arch_switch_idx);
8989
}
9090
}
9191

@@ -97,7 +97,7 @@ RRNodeId RoutingToClockConnection::create_virtual_clock_network_sink_node(int x,
9797
RRNodeId node_index = RRNodeId(rr_graph.size() - 1);
9898

9999
//Determine the a valid PTC
100-
std::vector<RRNodeId> nodes_at_loc = node_lookup.find_sink_nodes(x, y);
100+
std::vector<RRNodeId> nodes_at_loc = node_lookup.find_grid_nodes_at_all_sides(x, y, SINK);
101101

102102
int max_ptc = 0;
103103
for (RRNodeId inode : nodes_at_loc) {
@@ -204,7 +204,7 @@ void ClockToClockConneciton::create_switches(const ClockRRGraphBuilder& clock_gr
204204
if (from_itter == from_rr_node_indices.end()) {
205205
from_itter = from_rr_node_indices.begin();
206206
}
207-
clock_graph.add_edge(rr_edges_to_create, *from_itter, to_index, arch_switch_idx);
207+
clock_graph.add_edge(rr_edges_to_create, RRNodeId(*from_itter), RRNodeId(to_index), arch_switch_idx);
208208
from_itter++;
209209
}
210210
}
@@ -317,7 +317,7 @@ void ClockToPinsConnection::create_switches(const ClockRRGraphBuilder& clock_gra
317317

318318
//Create edges depending on Fc
319319
for (size_t i = 0; i < clock_network_indices.size() * fc; i++) {
320-
clock_graph.add_edge(rr_edges_to_create, clock_network_indices[i], size_t(clock_pin_node_idx), arch_switch_idx);
320+
clock_graph.add_edge(rr_edges_to_create, RRNodeId(clock_network_indices[i]), RRNodeId(clock_pin_node_idx), arch_switch_idx);
321321
}
322322
}
323323
}

‎vpr/src/route/clock_network_builders.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -301,8 +301,8 @@ void ClockRib::create_rr_nodes_and_internal_edges_for_one_instance(ClockRRGraphB
301301
clock_graph);
302302

303303
// connect drive point to each half rib using a directed switch
304-
clock_graph.add_edge(rr_edges_to_create, drive_node_idx, left_node_idx, drive.switch_idx);
305-
clock_graph.add_edge(rr_edges_to_create, drive_node_idx, right_node_idx, drive.switch_idx);
304+
clock_graph.add_edge(rr_edges_to_create, RRNodeId(drive_node_idx), RRNodeId(left_node_idx), drive.switch_idx);
305+
clock_graph.add_edge(rr_edges_to_create, RRNodeId(drive_node_idx), RRNodeId(right_node_idx), drive.switch_idx);
306306
}
307307
}
308308
}
@@ -606,8 +606,8 @@ void ClockSpine::create_rr_nodes_and_internal_edges_for_one_instance(ClockRRGrap
606606
clock_graph);
607607

608608
// connect drive point to each half spine using a directed switch
609-
clock_graph.add_edge(rr_edges_to_create, drive_node_idx, left_node_idx, drive.switch_idx);
610-
clock_graph.add_edge(rr_edges_to_create, drive_node_idx, right_node_idx, drive.switch_idx);
609+
clock_graph.add_edge(rr_edges_to_create, RRNodeId(drive_node_idx), RRNodeId(left_node_idx), drive.switch_idx);
610+
clock_graph.add_edge(rr_edges_to_create, RRNodeId(drive_node_idx), RRNodeId(right_node_idx), drive.switch_idx);
611611
}
612612
}
613613
}

‎vpr/src/route/connection_router.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -577,7 +577,7 @@ void ConnectionRouter<Heap>::timing_driven_add_to_heap(const t_conn_cost_params
577577
if (rcv_path_manager.is_enabled() && current->path_data) {
578578
next_ptr->path_data->path_rr = current->path_data->path_rr;
579579
next_ptr->path_data->edge = current->path_data->edge;
580-
next_ptr->path_data->path_rr.emplace_back(from_node);
580+
next_ptr->path_data->path_rr.emplace_back(RRNodeId(from_node));
581581
next_ptr->path_data->edge.emplace_back(from_edge);
582582
}
583583

‎vpr/src/route/router_lookahead_map_utils.cpp

Lines changed: 3 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -308,8 +308,6 @@ t_src_opin_delays compute_router_src_opin_lookahead() {
308308

309309
src_opin_delays.resize(device_ctx.physical_tile_types.size());
310310

311-
std::vector<int> rr_nodes_at_loc;
312-
313311
//We assume that the routing connectivity of each instance of a physical tile is the same,
314312
//and so only measure one instance of each type
315313
for (size_t itile = 0; itile < device_ctx.physical_tile_types.size(); ++itile) {
@@ -334,14 +332,8 @@ t_src_opin_delays compute_router_src_opin_lookahead() {
334332

335333
//VTR_LOG("Sampling %s at (%d,%d)\n", device_ctx.physical_tile_types[itile].name, sample_loc.x(), sample_loc.y());
336334

337-
rr_nodes_at_loc.clear();
338-
339-
get_rr_node_indices(device_ctx.rr_node_indices, sample_loc.x(), sample_loc.y(), rr_type, &rr_nodes_at_loc);
340-
for (int inode : rr_nodes_at_loc) {
341-
if (inode < 0) continue;
342-
343-
RRNodeId node_id(inode);
344-
335+
const std::vector<RRNodeId>& rr_nodes_at_loc = device_ctx.rr_graph.node_lookup().find_grid_nodes_at_all_sides(sample_loc.x(), sample_loc.y(), rr_type);
336+
for (RRNodeId node_id : rr_nodes_at_loc) {
345337
int ptc = rr_graph.node_ptc_num(node_id);
346338

347339
if (ptc >= int(src_opin_delays[itile].size())) {
@@ -355,7 +347,7 @@ t_src_opin_delays compute_router_src_opin_lookahead() {
355347
if (src_opin_delays[itile][ptc].empty()) {
356348
VTR_LOGV_DEBUG(f_router_debug, "Found no reachable wires from %s (%s) at (%d,%d)\n",
357349
rr_node_typename[rr_type],
358-
rr_node_arch_name(inode).c_str(),
350+
rr_node_arch_name(size_t(node_id)).c_str(),
359351
sample_loc.x(),
360352
sample_loc.y());
361353

‎vpr/src/route/rr_edge.h

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,15 +1,17 @@
11
#ifndef RR_EDGE_H
22
#define RR_EDGE_H
33

4+
#include "rr_graph_fwd.h"
5+
46
/* TODO: MUST change the node id to RRNodeId before refactoring is finished! */
57
struct t_rr_edge_info {
6-
t_rr_edge_info(int from, int to, short type) noexcept
8+
t_rr_edge_info(RRNodeId from, RRNodeId to, short type) noexcept
79
: from_node(from)
810
, to_node(to)
911
, switch_type(type) {}
1012

11-
int from_node = OPEN;
12-
int to_node = OPEN;
13+
RRNodeId from_node = RRNodeId::INVALID();
14+
RRNodeId to_node = RRNodeId::INVALID();
1315
short switch_type = OPEN;
1416

1517
friend bool operator<(const t_rr_edge_info& lhs, const t_rr_edge_info& rhs) {

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