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Added a markdown file to keep track of uses of xlow (for RRGraphView)
Signed-off-by: Ethan Rogers <[email protected]>
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doc/rr_graph_view/uses_of_xlow.md

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## Uses of xlow, xhigh, ylow, yhigh
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| Function | Use Scenario | One Usage (Location) | Count |
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| -- | -- | -- | -- |
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| xlow | retrieve physical tile from device_ctx.grid | test_fasm.cpp:193 | 16 |
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| xlow | Obtain length of wire | stats.cpp:313 | 3 |
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| xlow | Determine switchpoint | draw.cpp:1475 | 1 |
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| xlow | Draw from one edge to the other | draw.cpp:1934 | 1 |
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| xlow | Create bounding box | draw.cpp:2083 | 1 |
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| xlow | Check if nodes are adjacent | check_route.cpp:481 | 1 |
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| xlow | Check if node is initialized | check_route.cpp:64 | 3 |
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| xlow | Include x value in console output | check_route.cpp:258 | 5 |
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| xlow | Create a serial num for the wire x value in console output | check_route.cpp:198 | 3 |
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| xlow | Count cblocks | rr_graph_area.cpp:229 | 3 |
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| xlow | Return the segment number (distance along the channel) of the connection box from from_rr_type (CHANX or CHANY) to to_node (IPIN) | rr_graph_util.cpp:21 | 1 |
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| xlow | Check direction going from one node to another| rr_graph_util.cpp:45 | 1 |
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| xlow | Write Coordinates | VprTimingGraphResolver.cpp:345 | 1 |
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<br><br><br>
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## Retrieve Physical Tile from device_ctx.grid
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```cpp
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static std::string get_pin_feature (size_t inode) {
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auto& device_ctx = g_vpr_ctx.device();
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// Get tile physical tile and the pin number
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int ilow = device_ctx.rr_nodes[inode].xlow(); // <----------------------------- Use of xlow()
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int jlow = device_ctx.rr_nodes[inode].ylow();
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auto physical_tile = device_ctx.grid[ilow][jlow].type;
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int pin_num = device_ctx.rr_nodes[inode].ptc_num();
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// Get the sub tile (type, not instance) and index of its pin that matches
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// the node index.
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const t_sub_tile* sub_tile_type = nullptr;
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int sub_tile_pin = -1;
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for (auto& sub_tile : physical_tile->sub_tiles) {
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auto max_inst_pins = sub_tile.num_phy_pins / sub_tile.capacity.total();
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for (int pin = 0; pin < sub_tile.num_phy_pins; pin++) {
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if (sub_tile.sub_tile_to_tile_pin_indices[pin] == pin_num) {
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sub_tile_type = &sub_tile;
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sub_tile_pin = pin % max_inst_pins;
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break;
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}
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}
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if (sub_tile_type != nullptr) {
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break;
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}
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}
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```
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<br><br><br>
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## Obtain length of wire
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```cpp
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while (tptr != nullptr) {
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inode = tptr->index;
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curr_type = device_ctx.rr_nodes[inode].type();
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if (curr_type == SINK) { /* Starting a new segment */
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tptr = tptr->next; /* Link to existing path - don't add to len. */
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if (tptr == nullptr)
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break;
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curr_type = device_ctx.rr_nodes[tptr->index].type();
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}
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else if (curr_type == CHANX || curr_type == CHANY) {
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segments++;
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length += 1 + device_ctx.rr_nodes[inode].xhigh() - device_ctx.rr_nodes[inode].xlow() // <----------------------------- Use of xlow()
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+ device_ctx.rr_nodes[inode].yhigh() - device_ctx.rr_nodes[inode].ylow();
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if (curr_type != prev_type && (prev_type == CHANX || prev_type == CHANY))
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bends++;
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}
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prev_type = curr_type;
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tptr = tptr->next;
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}
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*bends_ptr = bends;
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*len_ptr = length;
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*segments_ptr = segments;
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}
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```

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