Merge pull request #2673 from verilog-to-routing/dependabot/submodule… #141

Job	Run time
Run-tests (vtr_reg_nightly_test1, 16)	9m 35s
Run-tests (vtr_reg_nightly_test1_odin, 16, -DWITH_ODIN=ON)	9m 34s
Run-tests (vtr_reg_nightly_test2, 16)	9m 41s
Run-tests (vtr_reg_nightly_test2_odin, 16, -DWITH_ODIN=ON)	9m 43s
Run-tests (vtr_reg_nightly_test3, 16)	9m 34s
Run-tests (vtr_reg_nightly_test3_odin, 16, -DWITH_ODIN=ON)	9m 37s
Run-tests (vtr_reg_nightly_test4, 16)	9m 37s
Run-tests (vtr_reg_nightly_test4_odin, 16, -DWITH_ODIN=ON)	9m 33s
Run-tests (vtr_reg_nightly_test5, 16)	9m 34s
Run-tests (vtr_reg_nightly_test6, 16)	9m 40s
Run-tests (vtr_reg_nightly_test7, 16)	9m 33s
Run-tests (vtr_reg_strong, 16, -DVTR_ASSERT_LEVEL=3, libeigen3-dev)	7m 41s
Run-tests (vtr_reg_strong_odin, 16, -DVTR_ASSERT_LEVEL=3 -DWITH_ODIN=ON, libeigen3-dev)	9m 34s
Run-tests (vtr_reg_strong_odin, 16, -skip_qor, -DVTR_ASSERT_LEVEL=3 -DVTR_ENABLE_SANITIZE=ON -DWI...	9m 35s
Run-tests (vtr_reg_system_verilog, 16, -DYOSYS_F4PGA_PLUGINS=ON)	9m 33s
Run-tests (odin_reg_strong, 16, -DWITH_ODIN=ON)	7m 46s
Run-tests (parmys_reg_strong, 16, -DYOSYS_F4PGA_PLUGINS=ON)	9m 35s
	2h 39m 25s

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