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Fix for Handling Missing Switch Types in RR Graph Builder #108

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Fix for Handling Missing Switch Types in RR Graph Builder

Fix for Handling Missing Switch Types in RR Graph Builder #108

Run time

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Job Run time
Run-tests (vtr_reg_nightly_test1, 16)
1s
Run-tests (vtr_reg_nightly_test1_odin, 16, -DWITH_ODIN=ON)
1s
Run-tests (vtr_reg_nightly_test2, 16)
1s
Run-tests (vtr_reg_nightly_test2_odin, 16, -DWITH_ODIN=ON)
1s
Run-tests (vtr_reg_nightly_test3, 16)
1s
Run-tests (vtr_reg_nightly_test3_odin, 16, -DWITH_ODIN=ON)
1s
Run-tests (vtr_reg_nightly_test4, 16)
1s
Run-tests (vtr_reg_nightly_test4_odin, 16, -DWITH_ODIN=ON)
1s
Run-tests (vtr_reg_nightly_test5, 16)
1s
Run-tests (vtr_reg_nightly_test6, 16)
1s
Run-tests (vtr_reg_nightly_test7, 16)
1s
Run-tests (vtr_reg_strong, 16, -DVTR_ASSERT_LEVEL=3, libeigen3-dev)
1s
Run-tests (vtr_reg_strong_odin, 16, -DVTR_ASSERT_LEVEL=3 -DWITH_ODIN=ON, libeigen3-dev)
1s
Run-tests (vtr_reg_strong_odin, 16, -skip_qor, -DVTR_ASSERT_LEVEL=3 -DVTR_ENABLE_SANITIZE=ON -DWI...
1s
Run-tests (vtr_reg_system_verilog, 16, -DYOSYS_F4PGA_PLUGINS=ON)
1s
Run-tests (odin_reg_strong, 16, -DWITH_ODIN=ON)
1s
Run-tests (parmys_reg_strong, 16, -DYOSYS_F4PGA_PLUGINS=ON)
1s
17s