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chore: update to STM32CubeCLT version 1.17.0
Signed-off-by: Frederic Pillon <[email protected]>
1 parent 4883313 commit 0f1915e

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+1919070
-91292
lines changed

svd/Core/Cortex-M55.svd

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svd/STM32C0xx/STM32C011.svd

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svd/STM32C0xx/STM32C031.svd

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svd/STM32C0xx/STM32C051.svd

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svd/STM32C0xx/STM32C071.svd

Lines changed: 18 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -3645,7 +3645,7 @@ Note: Software can write these bits only when ADEN=1 (ADC is enabled and no cali
36453645
<addressOffset>0x308</addressOffset>
36463646
<size>0x20</size>
36473647
<access>read-write</access>
3648-
<resetValue>0x00000000</resetValue>
3648+
<resetValue>0x00000000</resetValue>
36493649
<resetMask>0xFFFFFFFF</resetMask>
36503650
<fields>
36513651
<field>
@@ -4449,7 +4449,7 @@ Refer to Section 7.4.4 for more details about FECAP usage.</description>
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<addressOffset>0x0C</addressOffset>
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<size>0x20</size>
44514451
<access>read-write</access>
4452-
<resetValue>0x00000000</resetValue>
4452+
<resetValue>0x00000000</resetValue>
44534453
<resetMask>0xFFFFFFFF</resetMask>
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<fields>
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<field>
@@ -4719,7 +4719,7 @@ This bit enables/disables the clock to the counter of IWDG when the core is halt
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<addressOffset>0x0C</addressOffset>
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<size>0x20</size>
47214721
<access>read-write</access>
4722-
<resetValue>0x00000000</resetValue>
4722+
<resetValue>0x00000000</resetValue>
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<resetMask>0xFFFFFFFF</resetMask>
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<fields>
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<field>
@@ -7178,7 +7178,7 @@ Note: This bitfield is set and cleared by software. It must not be written when
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<addressOffset>0x64</addressOffset>
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<size>0x20</size>
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<access>read-write</access>
7181-
<resetValue>0x00000000</resetValue>
7181+
<resetValue>0x00000000</resetValue>
71827182
<resetMask>0xFFFFFFFF</resetMask>
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<fields>
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<field>
@@ -8386,7 +8386,7 @@ The flag is cleared by writing 1 to the corresponding COFx bit in the DMAMUX_RGC
83868386
<addressOffset>0x144</addressOffset>
83878387
<size>0x20</size>
83888388
<access>write-only</access>
8389-
<resetValue>0x00000000</resetValue>
8389+
<resetValue>0x00000000</resetValue>
83908390
<resetMask>0xFFFFFFFF</resetMask>
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<fields>
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<field>
@@ -11835,7 +11835,7 @@ Setting/clearing the bit unmasks/masks the CPU wakeup with interrupt request fro
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<addressOffset>0x094</addressOffset>
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<size>0x20</size>
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<access>read-write</access>
11838-
<resetValue>0x00000000</resetValue>
11838+
<resetValue>0x00000000</resetValue>
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<resetMask>0xFFFFFFFF</resetMask>
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<fields>
1184111841
<field>
@@ -39002,7 +39002,7 @@ Data byte received from the I&lt;sup&gt;2&lt;/sup&gt;C bus</description>
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<addressOffset>0x28</addressOffset>
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<size>0x20</size>
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<access>read-write</access>
39005-
<resetValue>0x00000000</resetValue>
39005+
<resetValue>0x00000000</resetValue>
3900639006
<resetMask>0xFFFFFFFF</resetMask>
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<fields>
3900839008
<field>
@@ -40965,7 +40965,7 @@ This bitfield retains information when the device is in Standby.</description>
4096540965
<addressOffset>0x7C</addressOffset>
4096640966
<size>0x20</size>
4096740967
<access>read-write</access>
40968-
<resetValue>0x00000000</resetValue>
40968+
<resetValue>0x00000000</resetValue>
4096940969
<resetMask>0xFFFFFFFF</resetMask>
4097040970
<fields>
4097140971
<field>
@@ -44403,7 +44403,7 @@ Set and cleared by software to select the low-speed output clock:</description>
4440344403
<addressOffset>0x60</addressOffset>
4440444404
<size>0x20</size>
4440544405
<access>read-write</access>
44406-
<resetValue>0x00000000</resetValue>
44406+
<resetValue>0x00000000</resetValue>
4440744407
<resetMask>0x00FFFFFF</resetMask>
4440844408
<fields>
4440944409
<field>
@@ -45895,7 +45895,7 @@ It is recommended to check and then clear TSOVF only after clearing the TSF bit.
4589545895
<addressOffset>0x5C</addressOffset>
4589645896
<size>0x20</size>
4589745897
<access>write-only</access>
45898-
<resetValue>0x00000000</resetValue>
45898+
<resetValue>0x00000000</resetValue>
4589945899
<resetMask>0xFFFFFFFF</resetMask>
4590045900
<fields>
4590145901
<field>
@@ -48388,7 +48388,7 @@ Note: Only applicable on STM32C071xx, reserved on the other products.</descripti
4838848388
<addressOffset>0xF0</addressOffset>
4838948389
<size>0x20</size>
4839048390
<access>read-only</access>
48391-
<resetValue>0x00000000</resetValue>
48391+
<resetValue>0x00000000</resetValue>
4839248392
<resetMask>0xFFFFFFFF</resetMask>
4839348393
<fields>
4839448394
<field>
@@ -52024,7 +52024,7 @@ Note: This bit can not be modified as long as LOCK level 1 has been programmed (
5202452024
<addressOffset>0x68</addressOffset>
5202552025
<size>0x20</size>
5202652026
<access>read-write</access>
52027-
<resetValue>0x00000000</resetValue>
52027+
<resetValue>0x00000000</resetValue>
5202852028
<resetMask>0xFFFFFFFF</resetMask>
5202952029
<fields>
5203052030
<field>
@@ -56649,7 +56649,7 @@ Others: Reserved</description>
5664956649
<addressOffset>0x68</addressOffset>
5665056650
<size>0x20</size>
5665156651
<access>read-write</access>
56652-
<resetValue>0x00000000</resetValue>
56652+
<resetValue>0x00000000</resetValue>
5665356653
<resetMask>0xFFFFFFFF</resetMask>
5665456654
<fields>
5665556655
<field>
@@ -59182,7 +59182,7 @@ Note: This bit can not be modified as long as LOCK level 1 has been programmed (
5918259182
<addressOffset>0x68</addressOffset>
5918359183
<size>0x20</size>
5918459184
<access>read-write</access>
59185-
<resetValue>0x00000000</resetValue>
59185+
<resetValue>0x00000000</resetValue>
5918659186
<resetMask>0xFFFFFFFF</resetMask>
5918759187
<fields>
5918859188
<field>
@@ -60833,7 +60833,7 @@ Note: This bit can not be modified as long as LOCK level 1 has been programmed (
6083360833
<addressOffset>0x68</addressOffset>
6083460834
<size>0x20</size>
6083560835
<access>read-write</access>
60836-
<resetValue>0x00000000</resetValue>
60836+
<resetValue>0x00000000</resetValue>
6083760837
<resetMask>0xFFFFFFFF</resetMask>
6083860838
<fields>
6083960839
<field>
@@ -64239,7 +64239,7 @@ Note: This register must be written only when TXE/TXFNF = 1.</description>
6423964239
<addressOffset>0x2C</addressOffset>
6424064240
<size>0x20</size>
6424164241
<access>read-write</access>
64242-
<resetValue>0x00000000</resetValue>
64242+
<resetValue>0x00000000</resetValue>
6424364243
<resetMask>0xFFFFFFFF</resetMask>
6424464244
<fields>
6424564245
<field>
@@ -67088,7 +67088,7 @@ Note: When PRESCALER is programmed with a value different of the allowed ones, p
6708867088
<addressOffset>0x58</addressOffset>
6708967089
<size>0x20</size>
6709067090
<access>read-write</access>
67091-
<resetValue>0x00000000</resetValue>
67091+
<resetValue>0x00000000</resetValue>
6709267092
<resetMask>0xFFFFFFFF</resetMask>
6709367093
<fields>
6709467094
<field>
@@ -67338,7 +67338,7 @@ The timebase of the prescaler can be modified as follows:</description>
6733867338
<addressOffset>0x008</addressOffset>
6733967339
<size>0x20</size>
6734067340
<access>read-write</access>
67341-
<resetValue>0x00000000</resetValue>
67341+
<resetValue>0x00000000</resetValue>
6734267342
<resetMask>0xFFFFFFFF</resetMask>
6734367343
<fields>
6734467344
<field>

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