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Full Alternate function management for F1 series #84

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Merged
merged 3 commits into from
Aug 21, 2017
Merged

Full Alternate function management for F1 series #84

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4fb68af
Update AF for STM32F1
fpistm Aug 18, 2017
b1325bf
Increase Alternate Function "bitfield" size required by the F1
fpistm Aug 19, 2017
48c42bd
Set the GPIO Mode to STM_MODE_INPUT instead of STM_MODE_AF_PP for F1
fpistm Aug 20, 2017
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353 changes: 304 additions & 49 deletions cores/arduino/stm32/PinAF_STM32F1.h
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Original file line number Diff line number Diff line change
Expand Up @@ -56,6 +56,8 @@ static inline void pinF1_DisconnectDebug(PinName pin)
if ((pin == PA_15) || (pin == PB_3) || (pin == PB_4)) {
__HAL_AFIO_REMAP_SWJ_NOJTAG(); // JTAG-DP Disabled and SW-DP enabled
}
#else
UNUSED(pin);
#endif /* STM32F1_FORCE_DEBUG */
}

Expand All @@ -64,55 +66,308 @@ static inline void pin_SetF1AFPin(uint32_t afnum)
// Enable AFIO clock
__HAL_RCC_AFIO_CLK_ENABLE();

if (afnum > 0) {
switch (afnum) {
case 1: // Remap SPI1
__HAL_AFIO_REMAP_SPI1_ENABLE();
break;
case 2: // Remap I2C1
__HAL_AFIO_REMAP_I2C1_ENABLE();
break;
case 3: // Remap USART1
__HAL_AFIO_REMAP_USART1_ENABLE();
break;
case 4: // Remap USART2
__HAL_AFIO_REMAP_USART2_ENABLE();
break;
case 5: // Partial Remap USART3
__HAL_AFIO_REMAP_USART3_PARTIAL();
break;
case 6: // Partial Remap TIM1
__HAL_AFIO_REMAP_TIM1_PARTIAL();
break;
case 7: // Partial Remap TIM3
__HAL_AFIO_REMAP_TIM3_PARTIAL();
break;
case 8: // Full Remap TIM2
__HAL_AFIO_REMAP_TIM2_ENABLE();
break;
case 9: // Full Remap TIM3
__HAL_AFIO_REMAP_TIM3_ENABLE();
break;
#if defined(AFIO_MAPR_CAN_REMAP_REMAP1)
case 10: // CAN_RX mapped to PB8, CAN_TX mapped to PB9
__HAL_AFIO_REMAP_CAN1_2();
break;
case 11: // CAN_RX mapped to PB8, CAN_TX mapped to PB9
__HAL_AFIO_REMAP_CAN1_3();
break;
#endif
case 12: // Full Remap USART3
__HAL_AFIO_REMAP_USART3_ENABLE();
break;
case 13: // Full Remap TIM1
__HAL_AFIO_REMAP_TIM1_ENABLE();
break;
case 14: // Full Remap TIM4
__HAL_AFIO_REMAP_TIM4_ENABLE();
break;
default:
break;
}
switch (afnum) {
case AFIO_SPI1_ENABLE:
__HAL_AFIO_REMAP_SPI1_ENABLE();
break;
case AFIO_SPI1_DISABLE:
__HAL_AFIO_REMAP_SPI1_DISABLE();
break;
case AFIO_I2C1_ENABLE:
__HAL_AFIO_REMAP_I2C1_ENABLE();
break;
case AFIO_I2C1_DISABLE:
__HAL_AFIO_REMAP_I2C1_DISABLE();
break;
case AFIO_USART1_ENABLE:
__HAL_AFIO_REMAP_USART1_ENABLE();
break;
case AFIO_USART1_DISABLE:
__HAL_AFIO_REMAP_USART1_DISABLE();
break;
case AFIO_USART2_ENABLE:
__HAL_AFIO_REMAP_USART2_ENABLE();
break;
case AFIO_USART2_DISABLE:
__HAL_AFIO_REMAP_USART2_DISABLE();
break;
case AFIO_USART3_ENABLE:
__HAL_AFIO_REMAP_USART3_ENABLE();
break;
case AFIO_USART3_PARTIAL:
__HAL_AFIO_REMAP_USART3_PARTIAL();
break;
case AFIO_USART3_DISABLE:
__HAL_AFIO_REMAP_USART3_DISABLE();
break;
case AFIO_TIM1_ENABLE:
__HAL_AFIO_REMAP_TIM1_ENABLE();
break;
case AFIO_TIM1_PARTIAL:
__HAL_AFIO_REMAP_TIM1_PARTIAL();
break;
case AFIO_TIM1_DISABLE:
__HAL_AFIO_REMAP_TIM1_DISABLE();
break;
case AFIO_TIM2_ENABLE:
__HAL_AFIO_REMAP_TIM2_ENABLE();
break;
case AFIO_TIM2_PARTIAL_2:
__HAL_AFIO_REMAP_TIM2_PARTIAL_2();
break;
case AFIO_TIM2_PARTIAL_1:
__HAL_AFIO_REMAP_TIM2_PARTIAL_1();
break;
case AFIO_TIM2_DISABLE:
__HAL_AFIO_REMAP_TIM2_DISABLE();
break;
case AFIO_TIM3_ENABLE:
__HAL_AFIO_REMAP_TIM3_ENABLE();
break;
case AFIO_TIM3_PARTIAL:
__HAL_AFIO_REMAP_TIM3_PARTIAL();
break;
case AFIO_TIM3_DISABLE:
__HAL_AFIO_REMAP_TIM3_DISABLE();
break;
case AFIO_TIM4_ENABLE:
__HAL_AFIO_REMAP_TIM4_ENABLE();
break;
case AFIO_TIM4_DISABLE:
__HAL_AFIO_REMAP_TIM4_DISABLE();
break;
#if defined(AFIO_MAPR_CAN_REMAP1)
case AFIO_CAN1_1:
__HAL_AFIO_REMAP_CAN1_1();
break;
case AFIO_CAN1_2:
__HAL_AFIO_REMAP_CAN1_2();
break;
case AFIO_CAN1_3:
__HAL_AFIO_REMAP_CAN1_3();
break;
#endif
case AFIO_PD01_ENABLE:
__HAL_AFIO_REMAP_PD01_ENABLE();
break;
case AFIO_PD01_DISABLE:
__HAL_AFIO_REMAP_PD01_DISABLE();
break;
#if defined(AFIO_MAPR_TIM5CH4_IREMAP)
case AFIO_TIM5CH4_ENABLE:
__HAL_AFIO_REMAP_TIM5CH4_ENABLE();
break;
case AFIO_TIM5CH4_DISABLE:
__HAL_AFIO_REMAP_TIM5CH4_DISABLE();
break;
#endif
#if defined(AFIO_MAPR_ETH_REMAP)
case AFIO_ETH_ENABLE:
__HAL_AFIO_REMAP_ETH_ENABLE();
break;
case AFIO_ETH_DISABLE:
__HAL_AFIO_REMAP_ETH_DISABLE();
break;
#endif
#if defined(AFIO_MAPR_CAN2_REMAP)
case AFIO_CAN2_ENABLE:
__HAL_AFIO_REMAP_CAN2_ENABLE();
break;
case AFIO_CAN2_DISABLE:
__HAL_AFIO_REMAP_CAN2_DISABLE();
break;
#endif
#if defined(AFIO_MAPR_MII_RMII_SEL)
case AFIO_ETH_RMII:
__HAL_AFIO_ETH_RMII();
break;
case AFIO_ETH_MII:
__HAL_AFIO_ETH_MII();
break;
#endif
#if defined(AFIO_MAPR_ADC1_ETRGINJ_REMAP)
case AFIO_ADC1_ETRGINJ_ENABLE:
__HAL_AFIO_REMAP_ADC1_ETRGINJ_ENABLE();
break;
case AFIO_ADC1_ETRGINJ_DISABLE:
__HAL_AFIO_REMAP_ADC1_ETRGINJ_DISABLE();
break;
#endif
#if defined(AFIO_MAPR_ADC1_ETRGREG_REMAP)
case AFIO_ADC1_ETRGREG_ENABLE:
__HAL_AFIO_REMAP_ADC1_ETRGREG_ENABLE();
break;
case AFIO_ADC1_ETRGREG_DISABLE:
__HAL_AFIO_REMAP_ADC1_ETRGREG_DISABLE();
break;
#endif
#if defined(AFIO_MAPR_ADC2_ETRGINJ_REMAP)
case AFIO_ADC2_ETRGINJ_ENABLE:
__HAL_AFIO_REMAP_ADC2_ETRGINJ_ENABLE();
break;
case AFIO_ADC2_ETRGINJ_DISABLE:
__HAL_AFIO_REMAP_ADC2_ETRGINJ_DISABLE();
break;
#endif
#if defined(AFIO_MAPR_ADC2_ETRGREG_REMAP)
case AFIO_ADC2_ETRGREG_ENABLE:
__HAL_AFIO_REMAP_ADC2_ETRGREG_ENABLE();
break;
case AFIO_ADC2_ETRGREG_DISABLE:
__HAL_AFIO_REMAP_ADC2_ETRGREG_DISABLE();
break;
#endif
case AFIO_SWJ_ENABLE:
__HAL_AFIO_REMAP_SWJ_ENABLE();
break;
case AFIO_SWJ_NONJTRST:
__HAL_AFIO_REMAP_SWJ_NONJTRST();
break;
case AFIO_SWJ_NOJTAG:
__HAL_AFIO_REMAP_SWJ_NOJTAG();
break;
case AFIO_SWJ_DISABLE:
__HAL_AFIO_REMAP_SWJ_DISABLE();
break;
#if defined(AFIO_MAPR_SPI3_REMAP)
case AFIO_SPI3_ENABLE:
__HAL_AFIO_REMAP_SPI3_ENABLE();
break;
case AFIO_SPI3_DISABLE:
__HAL_AFIO_REMAP_SPI3_DISABLE();
break;
#endif
#if defined(AFIO_MAPR_TIM2ITR1_IREMAP)
case AFIO_TIM2ITR1_TO_USB:
__HAL_AFIO_TIM2ITR1_TO_USB();
break;
case AFIO_TIM2ITR1_TO_ETH:
__HAL_AFIO_TIM2ITR1_TO_ETH();
break;
#endif
#if defined(AFIO_MAPR_PTP_PPS_REMAP)
case AFIO_ETH_PTP_PPS_ENABLE:
__HAL_AFIO_ETH_PTP_PPS_ENABLE();
break;
case AFIO_ETH_PTP_PPS_DISABLE:
__HAL_AFIO_ETH_PTP_PPS_DISABLE();
break;
#endif
#if defined(AFIO_MAPR2_TIM9_REMAP)
case AFIO_TIM9_ENABLE:
__HAL_AFIO_REMAP_TIM9_ENABLE();
break;
case AFIO_TIM9_DISABLE:
__HAL_AFIO_REMAP_TIM9_DISABLE();
break;
#endif
#if defined(AFIO_MAPR2_TIM10_REMAP)
case AFIO_TIM10_ENABLE:
__HAL_AFIO_REMAP_TIM10_ENABLE();
break;
case AFIO_TIM10_DISABLE:
__HAL_AFIO_REMAP_TIM10_DISABLE();
break;
#endif
#if defined(AFIO_MAPR2_TIM11_REMAP)
case AFIO_TIM11_ENABLE:
__HAL_AFIO_REMAP_TIM11_ENABLE();
break;
case AFIO_TIM11_DISABLE:
__HAL_AFIO_REMAP_TIM11_DISABLE();
break;
#endif
#if defined(AFIO_MAPR2_TIM13_REMAP)
case AFIO_TIM13_ENABLE:
__HAL_AFIO_REMAP_TIM13_ENABLE();
break;
case AFIO_TIM13_DISABLE:
__HAL_AFIO_REMAP_TIM13_DISABLE();
break;
#endif
#if defined(AFIO_MAPR2_TIM14_REMAP)
case AFIO_TIM14_ENABLE:
__HAL_AFIO_REMAP_TIM14_ENABLE();
break;
case AFIO_TIM14_DISABLE:
__HAL_AFIO_REMAP_TIM14_DISABLE();
break;
#endif
#if defined(AFIO_MAPR2_FSMC_NADV_REMAP)
case AFIO_FSMCNADV_DISCONNECTED:
__HAL_AFIO_FSMCNADV_DISCONNECTED();
break;
case AFIO_FSMCNADV_CONNECTED:
__HAL_AFIO_FSMCNADV_CONNECTED();
break;
#endif
#if defined(AFIO_MAPR2_TIM15_REMAP)
case AFIO_TIM15_ENABLE:
__HAL_AFIO_REMAP_TIM15_ENABLE();
break;
case AFIO_TIM15_DISABLE:
__HAL_AFIO_REMAP_TIM15_DISABLE();
break;
#endif
#if defined(AFIO_MAPR2_TIM16_REMAP)
case AFIO_TIM16_ENABLE:
__HAL_AFIO_REMAP_TIM16_ENABLE();
break;
case AFIO_TIM16_DISABLE:
__HAL_AFIO_REMAP_TIM16_DISABLE();
break;
#endif
#if defined(AFIO_MAPR2_TIM17_REMAP)
case AFIO_TIM17_ENABLE:
__HAL_AFIO_REMAP_TIM17_ENABLE();
break;
case AFIO_TIM17_DISABLE:
__HAL_AFIO_REMAP_TIM17_DISABLE();
break;
#endif
#if defined(AFIO_MAPR2_CEC_REMAP)
case AFIO_CEC_ENABLE:
__HAL_AFIO_REMAP_CEC_ENABLE();
break;
case AFIO_CEC_DISABLE:
__HAL_AFIO_REMAP_CEC_DISABLE();
break;
#endif
#if defined(AFIO_MAPR2_TIM1_DMA_REMAP)
case AFIO_TIM1DMA_ENABLE:
__HAL_AFIO_REMAP_TIM1DMA_ENABLE();
break;
case AFIO_TIM1DMA_DISABLE:
__HAL_AFIO_REMAP_TIM1DMA_DISABLE();
break;
#endif
#if defined(AFIO_MAPR2_TIM67_DAC_DMA_REMAP)
case AFIO_TIM67DACDMA_ENABLE:
__HAL_AFIO_REMAP_TIM67DACDMA_ENABLE();
break;
case AFIO_TIM67DACDMA_DISABLE:
__HAL_AFIO_REMAP_TIM67DACDMA_DISABLE();
break;
#endif
#if defined(AFIO_MAPR2_TIM12_REMAP)
case AFIO_TIM12_ENABLE:
__HAL_AFIO_REMAP_TIM12_ENABLE();
break;
case AFIO_TIM12_DISABLE:
__HAL_AFIO_REMAP_TIM12_DISABLE();
break;
#endif
#if defined(AFIO_MAPR2_MISC_REMAP)
case AFIO_MISC_ENABLE:
__HAL_AFIO_REMAP_MISC_ENABLE();
break;
case AFIO_MISC_DISABLE:
__HAL_AFIO_REMAP_MISC_DISABLE();
break;
#endif
default:
case AFIO_NONE:
break;
}
}

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