variants(wb): add generic WB55V(C-E-G) and WB55VYY

README.md

@@ -769,6 +769,8 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
 | :green_heart: | STM32WB55CC<br>STM32WB55CE<br>STM32WB55CG | Generic Board | *2.0.0* |  |
 | :green_heart: | STM32WB5MMG | Generic Board | *2.1.0* |  |
 | :green_heart: | STM32WB55RC<br>STM32WB55RE<br>STM32WB55RG | Generic Board | *2.0.0* |  |
+| :yellow_heart: | STM32WB55VC<br>STM32WB55VE<br>STM32WB55VG | Generic Board | **2.10.0** |  |
+| :yellow_heart: | STM32WB55VY | Generic Board | **2.10.0** |  |
 
 ### Generic STM32WBA boards
 

boards.txt

@@ -12622,6 +12622,70 @@ GenWB.menu.pnum.GENERIC_WB55RGVX.build.product_line=STM32WB55xx
 GenWB.menu.pnum.GENERIC_WB55RGVX.build.variant=STM32WBxx/WB55R(C-E-G)V
 GenWB.menu.pnum.GENERIC_WB55RGVX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32WBxx/STM32WB55_CM4.svd
 
+# Generic WB55VCQx
+GenWB.menu.pnum.GENERIC_WB55VCQX=Generic WB55VCQx
+GenWB.menu.pnum.GENERIC_WB55VCQX.upload.maximum_size=131072
+GenWB.menu.pnum.GENERIC_WB55VCQX.upload.maximum_data_size=65536
+GenWB.menu.pnum.GENERIC_WB55VCQX.build.board=GENERIC_WB55VCQX
+GenWB.menu.pnum.GENERIC_WB55VCQX.build.product_line=STM32WB55xx
+GenWB.menu.pnum.GENERIC_WB55VCQX.build.variant=STM32WBxx/WB55V(C-E-G)(Q-Y)_WB55VYY
+GenWB.menu.pnum.GENERIC_WB55VCQX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32WBxx/STM32WB55_CM4.svd
+
+# Generic WB55VCYx
+GenWB.menu.pnum.GENERIC_WB55VCYX=Generic WB55VCYx
+GenWB.menu.pnum.GENERIC_WB55VCYX.upload.maximum_size=131072
+GenWB.menu.pnum.GENERIC_WB55VCYX.upload.maximum_data_size=65536
+GenWB.menu.pnum.GENERIC_WB55VCYX.build.board=GENERIC_WB55VCYX
+GenWB.menu.pnum.GENERIC_WB55VCYX.build.product_line=STM32WB55xx
+GenWB.menu.pnum.GENERIC_WB55VCYX.build.variant=STM32WBxx/WB55V(C-E-G)(Q-Y)_WB55VYY
+GenWB.menu.pnum.GENERIC_WB55VCYX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32WBxx/STM32WB55_CM4.svd
+
+# Generic WB55VEQx
+GenWB.menu.pnum.GENERIC_WB55VEQX=Generic WB55VEQx
+GenWB.menu.pnum.GENERIC_WB55VEQX.upload.maximum_size=262144
+GenWB.menu.pnum.GENERIC_WB55VEQX.upload.maximum_data_size=65536
+GenWB.menu.pnum.GENERIC_WB55VEQX.build.board=GENERIC_WB55VEQX
+GenWB.menu.pnum.GENERIC_WB55VEQX.build.product_line=STM32WB55xx
+GenWB.menu.pnum.GENERIC_WB55VEQX.build.variant=STM32WBxx/WB55V(C-E-G)(Q-Y)_WB55VYY
+GenWB.menu.pnum.GENERIC_WB55VEQX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32WBxx/STM32WB55_CM4.svd
+
+# Generic WB55VEYx
+GenWB.menu.pnum.GENERIC_WB55VEYX=Generic WB55VEYx
+GenWB.menu.pnum.GENERIC_WB55VEYX.upload.maximum_size=262144
+GenWB.menu.pnum.GENERIC_WB55VEYX.upload.maximum_data_size=196608
+GenWB.menu.pnum.GENERIC_WB55VEYX.build.board=GENERIC_WB55VEYX
+GenWB.menu.pnum.GENERIC_WB55VEYX.build.product_line=STM32WB55xx
+GenWB.menu.pnum.GENERIC_WB55VEYX.build.variant=STM32WBxx/WB55V(C-E-G)(Q-Y)_WB55VYY
+GenWB.menu.pnum.GENERIC_WB55VEYX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32WBxx/STM32WB55_CM4.svd
+
+# Generic WB55VGQx
+GenWB.menu.pnum.GENERIC_WB55VGQX=Generic WB55VGQx
+GenWB.menu.pnum.GENERIC_WB55VGQX.upload.maximum_size=524288
+GenWB.menu.pnum.GENERIC_WB55VGQX.upload.maximum_data_size=65536
+GenWB.menu.pnum.GENERIC_WB55VGQX.build.board=GENERIC_WB55VGQX
+GenWB.menu.pnum.GENERIC_WB55VGQX.build.product_line=STM32WB55xx
+GenWB.menu.pnum.GENERIC_WB55VGQX.build.variant=STM32WBxx/WB55V(C-E-G)(Q-Y)_WB55VYY
+GenWB.menu.pnum.GENERIC_WB55VGQX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32WBxx/STM32WB55_CM4.svd
+
+# Generic WB55VGYx
+GenWB.menu.pnum.GENERIC_WB55VGYX=Generic WB55VGYx
+GenWB.menu.pnum.GENERIC_WB55VGYX.upload.maximum_size=524288
+GenWB.menu.pnum.GENERIC_WB55VGYX.upload.maximum_data_size=196608
+GenWB.menu.pnum.GENERIC_WB55VGYX.build.board=GENERIC_WB55VGYX
+GenWB.menu.pnum.GENERIC_WB55VGYX.build.product_line=STM32WB55xx
+GenWB.menu.pnum.GENERIC_WB55VGYX.build.variant=STM32WBxx/WB55V(C-E-G)(Q-Y)_WB55VYY
+GenWB.menu.pnum.GENERIC_WB55VGYX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32WBxx/STM32WB55_CM4.svd
+
+# Generic WB55VYYx
+GenWB.menu.pnum.GENERIC_WB55VYYX=Generic WB55VYYx
+GenWB.menu.pnum.GENERIC_WB55VYYX.upload.maximum_size=327680
+GenWB.menu.pnum.GENERIC_WB55VYYX.upload.maximum_data_size=196608
+GenWB.menu.pnum.GENERIC_WB55VYYX.build.board=GENERIC_WB55VYYX
+GenWB.menu.pnum.GENERIC_WB55VYYX.build.product_line=STM32WB55xx
+GenWB.menu.pnum.GENERIC_WB55VYYX.build.variant=STM32WBxx/WB55V(C-E-G)(Q-Y)_WB55VYY
+GenWB.menu.pnum.GENERIC_WB55VYYX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32WBxx/STM32WB55_CM4.svd
+
+
 # Upload menu
 GenWB.menu.upload_method.swdMethod=STM32CubeProgrammer (SWD)
 GenWB.menu.upload_method.swdMethod.upload.protocol=swd

variants/STM32WBxx/WB55V(C-E-G)(Q-Y)_WB55VYY/generic_clock.c

@@ -15,6 +15,7 @@
     defined(ARDUINO_GENERIC_WB55VGQX) || defined(ARDUINO_GENERIC_WB55VGYX) ||\
     defined(ARDUINO_GENERIC_WB55VYYX)
 #include "pins_arduino.h"
+#include "lock_resource.h"
 
 /**
   * @brief  System Clock Configuration
@@ -23,8 +24,85 @@
   */
 WEAK void SystemClock_Config(void)
 {
-  /* SystemClock_Config can be generated by STM32CubeMX */
-#warning "SystemClock_Config() is empty. Default clock at reset is used."
+  RCC_OscInitTypeDef RCC_OscInitStruct = {};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
+  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
+
+  /* This prevents concurrent access to RCC registers by CPU2 (M0+) */
+  hsem_lock(CFG_HW_RCC_SEMID, HSEM_LOCK_DEFAULT_RETRY);
+
+  /** Configure the main internal regulator output voltage
+  */
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  /* This prevents the CPU2 (M0+) to disable the HSI48 oscillator */
+  hsem_lock(CFG_HW_CLK48_CONFIG_SEMID, HSEM_LOCK_DEFAULT_RETRY);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSI
+                                     | RCC_OSCILLATORTYPE_MSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.MSIState = RCC_MSI_ON;
+  RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1;
+  RCC_OscInitStruct.PLL.PLLN = 32;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+    Error_Handler();
+  }
+
+  /** Configure the SYSCLKSource, HCLK, PCLK1 and PCLK2 clocks dividers
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK4 | RCC_CLOCKTYPE_HCLK2
+                                | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+                                | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.AHBCLK2Divider = RCC_SYSCLK_DIV2;
+  RCC_ClkInitStruct.AHBCLK4Divider = RCC_SYSCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) {
+    Error_Handler();
+  }
+
+  /** Initializes the peripherals clock
+  */
+  PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_LPUART1
+                                             | RCC_PERIPHCLK_SMPS | RCC_PERIPHCLK_USB;
+  PeriphClkInitStruct.PLLSAI1.PLLN = 82;
+  PeriphClkInitStruct.PLLSAI1.PLLP = RCC_PLLP_DIV8;
+  PeriphClkInitStruct.PLLSAI1.PLLQ = RCC_PLLQ_DIV2;
+  PeriphClkInitStruct.PLLSAI1.PLLR = RCC_PLLR_DIV8;
+  PeriphClkInitStruct.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_ADCCLK;
+  PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_PLLSAI1;
+  PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_HSI;
+  PeriphClkInitStruct.SmpsClockSelection = RCC_SMPSCLKSOURCE_HSI;
+  PeriphClkInitStruct.SmpsDivSelection = RCC_SMPSCLKDIV_RANGE1;
+  PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
+
+  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
+    Error_Handler();
+  }
+
+  LL_PWR_SMPS_SetStartupCurrent(LL_PWR_SMPS_STARTUP_CURRENT_80MA);
+  LL_PWR_SMPS_SetOutputVoltageLevel(LL_PWR_SMPS_OUTPUT_VOLTAGE_1V40);
+  LL_PWR_SMPS_Enable();
+
+  /* Select HSI as system clock source after Wake Up from Stop mode */
+  LL_RCC_SetClkAfterWakeFromStop(LL_RCC_STOP_WAKEUPCLOCK_HSI);
+
+  hsem_unlock(CFG_HW_RCC_SEMID);
 }
 
 #endif /* ARDUINO_GENERIC_* */

variants/STM32WBxx/WB55V(C-E-G)(Q-Y)_WB55VYY/ldscript.ld

@@ -0,0 +1,185 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author      : STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32WB55xG Device
+**                      1024Kbytes FLASH
+**                      256Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** Copyright (c) 2024 STMicroelectronics.
+** All rights reserved.
+**
+** This software is licensed under terms that can be found in the LICENSE file
+** in the root directory of this software component.
+** If no LICENSE file comes with this software, it is provided AS-IS.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);    /* end of RAM */
+/* Generate a link error if heap and stack don't fit into RAM */
+_Min_Heap_Size = 0x200;  /* required amount of heap  */
+_Min_Stack_Size = 0x400; /* required amount of stack */
+
+/* Specify the memory areas */
+MEMORY
+{
+FLASH (rx)                 : ORIGIN = 0x08000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
+RAM (xrw)                 : ORIGIN = 0x20000008, LENGTH = LD_MAX_DATA_SIZE - 8
+RAM_SHARED (xrw)           : ORIGIN = 0x20030000, LENGTH = 10K
+}
+
+/* Define output sections */
+SECTIONS
+{
+  /* The startup code goes first into FLASH */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data goes into FLASH */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data goes into FLASH */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+  } >FLASH
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+  } >FLASH
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+  } >FLASH
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+  } >FLASH
+
+  /* used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections goes into RAM, load LMA copy after code */
+  .data :
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+    *(.RamFunc)        /* .RamFunc sections */
+    *(.RamFunc*)       /* .RamFunc* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough RAM left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the standard libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0       : { *(.ARM.attributes) }
+   MAPPING_TABLE (NOLOAD) : { *(MAPPING_TABLE) } >RAM_SHARED
+   MB_MEM1 (NOLOAD)       : { *(MB_MEM1) } >RAM_SHARED
+
+   /* used by the startup to initialize .MB_MEM2 data */
+  _siMB_MEM2 = LOADADDR(.MB_MEM2);
+  .MB_MEM2 :
+  {
+    _sMB_MEM2 = . ;
+    *(MB_MEM2) ;
+    _eMB_MEM2 = . ;
+  } >RAM_SHARED AT> FLASH
+}