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GNSE clock config update and moved to LoRa menu #1999

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Merged
merged 2 commits into from
Apr 12, 2023
Merged

GNSE clock config update and moved to LoRa menu #1999

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6b81de1
fix(GNSE): add missing LSE config
fpistm Apr 11, 2023
97d0273
chore(GNSE): moved to LoRa menu
fpistm Apr 11, 2023
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23 changes: 13 additions & 10 deletions boards.txt
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Original file line number Diff line number Diff line change
Expand Up @@ -9772,15 +9772,6 @@ GenWL.build.flash_offset=0x0
GenWL.upload.maximum_size=0
GenWL.upload.maximum_data_size=0

# Generic node SE by The Things Industries
GenWL.menu.pnum.GENERIC_NODE_SE_TTI=Generic Node SE (TTI)
GenWL.menu.pnum.GENERIC_NODE_SE_TTI.upload.maximum_size=262144
GenWL.menu.pnum.GENERIC_NODE_SE_TTI.upload.maximum_data_size=65536
GenWL.menu.pnum.GENERIC_NODE_SE_TTI.build.board=GENERIC_NODE_SE_TTI
GenWL.menu.pnum.GENERIC_NODE_SE_TTI.build.product_line=STM32WL55xx
GenWL.menu.pnum.GENERIC_NODE_SE_TTI.build.variant_h=variant_GENERIC_NODE_SE_TTI.h
GenWL.menu.pnum.GENERIC_NODE_SE_TTI.build.variant=STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U

# Generic WL54CCUx
GenWL.menu.pnum.GENERIC_WL54CCUX=Generic WL54CCUx
GenWL.menu.pnum.GENERIC_WL54CCUX.upload.maximum_size=262144
Expand Down Expand Up @@ -10465,6 +10456,19 @@ LoRa.menu.pnum.ACSIP_S76S.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
LoRa.menu.pnum.ACSIP_S76S.build.cmsis_lib_gcc=arm_cortexM0l_math
LoRa.menu.pnum.ACSIP_S76S.build.st_extra_flags=-D{build.product_line} {build.enable_usb} {build.xSerial} -D__CORTEX_SC=0

# Generic node SE by The Things Industries
LoRa.menu.pnum.GENERIC_NODE_SE_TTI=Generic Node SE (TTI)
LoRa.menu.pnum.GENERIC_NODE_SE_TTI.upload.maximum_size=262144
LoRa.menu.pnum.GENERIC_NODE_SE_TTI.upload.maximum_data_size=65536
LoRa.menu.pnum.GENERIC_NODE_SE_TTI.build.mcu=cortex-m4
LoRa.menu.pnum.GENERIC_NODE_SE_TTI.build.board=GENERIC_NODE_SE_TTI
LoRa.menu.pnum.GENERIC_NODE_SE_TTI.build.series=STM32WLxx
LoRa.menu.pnum.GENERIC_NODE_SE_TTI.build.product_line=STM32WL55xx
LoRa.menu.pnum.GENERIC_NODE_SE_TTI.build.variant=STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U
LoRa.menu.pnum.GENERIC_NODE_SE_TTI.build.variant_h=variant_GENERIC_NODE_SE_TTI.h
LoRa.menu.pnum.GENERIC_NODE_SE_TTI.build.cmsis_lib_gcc=arm_cortexM4l_math
LoRa.menu.pnum.GENERIC_NODE_SE_TTI.build.st_extra_flags=-D{build.product_line} -DUSE_CM4_STARTUP_FILE {build.xSerial}

# LORA_E5_MINI board
LoRa.menu.pnum.LORA_E5_MINI=LoRa-E5 mini
LoRa.menu.pnum.LORA_E5_MINI.upload.maximum_size=262144
Expand All @@ -10478,7 +10482,6 @@ LoRa.menu.pnum.LORA_E5_MINI.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
LoRa.menu.pnum.LORA_E5_MINI.build.variant_h=variant_LORA_E5_MINI.h
LoRa.menu.pnum.LORA_E5_MINI.build.cmsis_lib_gcc=arm_cortexM4l_math


# RAK811_TRACKER board
LoRa.menu.pnum.RAK811_TRACKER=RAK811 LoRa Tracker (16kb RAM)
LoRa.menu.pnum.RAK811_TRACKER.upload.maximum_size=131072
Expand Down
15 changes: 10 additions & 5 deletions ...nts/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U/variant_GENERIC_NODE_SE_TTI.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -70,15 +70,20 @@ WEAK void SystemClock_Config(void)
RCC_OscInitTypeDef RCC_OscInitStruct = {};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};

/** Configure LSE Drive Capability
*/
HAL_PWR_EnableBkUpAccess();
__HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
/** Configure the main internal regulator output voltage
*/
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
/** Initializes the CPU, AHB and APB busses clocks
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_MSI;
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
RCC_OscInitStruct.MSIState = RCC_MSI_ON;
RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6;
RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_11;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
Error_Handler();
Expand All @@ -94,12 +99,12 @@ WEAK void SystemClock_Config(void)
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.AHBCLK3Divider = RCC_SYSCLK_DIV1;

if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) {
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
Error_Handler();
}
}

#ifdef __cplusplus
}
#endif
#endif /* ARDUINO_GENERIC_* */
#endif /* ARDUINO_GENERIC_NODE_SE_TTI */