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Merged
merged 1 commit into from
Apr 5, 2023
Merged

Update to latest STM32CubeWB v1.16.0 #1996

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404 changes: 353 additions & 51 deletions system/Drivers/STM32WBxx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h
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4 changes: 2 additions & 2 deletions system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal.h
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Expand Up @@ -534,13 +534,13 @@ typedef enum
(((__INTERRUPT__) & SYSCFG_IT_FPU_IDC) == SYSCFG_IT_FPU_IDC) || \
(((__INTERRUPT__) & SYSCFG_IT_FPU_IXC) == SYSCFG_IT_FPU_IXC))

#if defined(STM32WB15xx)
#if defined(STM32WB15xx) || defined(STM32WB10xx)
#define IS_SYSCFG_SRAM2WRP_PAGE(__PAGE__) (((__PAGE__) > 0U) && ((__PAGE__) <= 0xFFFFFFFFU))
#define IS_SYSCFG_SRAM2WRP2_PAGE(__PAGE__) (((__PAGE__) > 0U) && ((__PAGE__) <= 0x0000000FU))
#else
#define IS_SYSCFG_SRAM2WRP_PAGE(__PAGE__) (((__PAGE__) > 0U) && ((__PAGE__) <= 0xFFFFFFFFU))
#define IS_SYSCFG_SRAM2WRP2_PAGE(__PAGE__) IS_SYSCFG_SRAM2WRP_PAGE(__PAGE__)
#endif /* STM32WB15xx */
#endif /* STM32WB15xx || STM32WB10xx */

#if defined(VREFBUF)
#define IS_SYSCFG_VREFBUF_VOLTAGE_SCALE(__SCALE__) (((__SCALE__) == SYSCFG_VREFBUF_VOLTAGE_SCALE0) || \
Expand Down
22 changes: 11 additions & 11 deletions system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_cortex.h
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Expand Up @@ -48,27 +48,27 @@ extern "C" {
*/
typedef struct
{
uint8_t Enable; /*!< Specifies the status of the region.
uint8_t Enable; /*!< Specifies the status of the region.
This parameter can be a value of @ref CORTEX_MPU_Region_Enable */
uint8_t Number; /*!< Specifies the number of the region to protect.
uint8_t Number; /*!< Specifies the number of the region to protect.
This parameter can be a value of @ref CORTEX_MPU_Region_Number */
uint32_t BaseAddress; /*!< Specifies the base address of the region to protect.
*/
uint8_t Size; /*!< Specifies the size of the region to protect.
uint8_t Size; /*!< Specifies the size of the region to protect.
This parameter can be a value of @ref CORTEX_MPU_Region_Size */
uint8_t SubRegionDisable; /*!< Specifies the number of the subregion protection to disable.
uint8_t SubRegionDisable; /*!< Specifies the number of the subregion protection to disable.
This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF */
uint8_t TypeExtField; /*!< Specifies the TEX field level.
This parameter can be a value of @ref CORTEX_MPU_TEX_Levels */
uint8_t AccessPermission; /*!< Specifies the region access permission type.
uint8_t AccessPermission; /*!< Specifies the region access permission type.
This parameter can be a value of @ref CORTEX_MPU_Region_Permission_Attributes */
uint8_t DisableExec; /*!< Specifies the instruction access status.
uint8_t DisableExec; /*!< Specifies the instruction access status.
This parameter can be a value of @ref CORTEX_MPU_Instruction_Access */
uint8_t IsShareable; /*!< Specifies the shareability status of the protected region.
uint8_t IsShareable; /*!< Specifies the shareability status of the protected region.
This parameter can be a value of @ref CORTEX_MPU_Access_Shareable */
uint8_t IsCacheable; /*!< Specifies the cacheable status of the region protected.
uint8_t IsCacheable; /*!< Specifies the cacheable status of the region protected.
This parameter can be a value of @ref CORTEX_MPU_Access_Cacheable */
uint8_t IsBufferable; /*!< Specifies the bufferable status of the protected region.
uint8_t IsBufferable; /*!< Specifies the bufferable status of the protected region.
This parameter can be a value of @ref CORTEX_MPU_Access_Bufferable */
} MPU_Region_InitTypeDef;
/**
Expand Down Expand Up @@ -213,8 +213,8 @@ typedef struct
/**
* @}
*/
/** @defgroup CORTEX_MPU_Region_Permission_Attributes CORTEX MPU Region Permission Attributes

/** @defgroup CORTEX_MPU_Region_Permission_Attributes CORTEX MPU Region Permission Attributes
* @{
*/
#define MPU_REGION_NO_ACCESS ((uint8_t)0x00)
Expand Down
166 changes: 84 additions & 82 deletions system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_dma.h
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120 changes: 68 additions & 52 deletions system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_flash.h
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1 change: 0 additions & 1 deletion system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_flash_ex.h
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Expand Up @@ -49,7 +49,6 @@ extern "C" {
* @}
*/


/** @defgroup FLASHEx_ECC_CPUID FLASHEx ECC CPU Identification
* @{
*/
Expand Down
2 changes: 1 addition & 1 deletion system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_gpio.h
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Expand Up @@ -242,7 +242,7 @@ typedef enum
(((uint32_t)(__PIN__) & ~GPIO_PIN_MASK) == 0x00u))

#define IS_GPIO_COMMON_PIN(__RESETMASK__, __SETMASK__) \
(((uint32_t)(__RESETMASK__) & (uint32_t)(__SETMASK__)) == 0x00u)
(((uint32_t)(__RESETMASK__) & (uint32_t)(__SETMASK__)) == 0x00u)


#define IS_GPIO_MODE(__MODE__) (((__MODE__) == GPIO_MODE_INPUT) ||\
Expand Down
34 changes: 17 additions & 17 deletions system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_gpio_ex.h
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Expand Up @@ -76,28 +76,28 @@ extern "C" {
/**
* @brief AF 1 selection
*/
#define GPIO_AF1_TIM1 ((uint8_t)0x01) /*!< TIM1 Alternate Function mapping */
#define GPIO_AF1_TIM2 ((uint8_t)0x01) /*!< TIM2 Alternate Function mapping */
#define GPIO_AF1_LPTIM1 ((uint8_t)0x01) /*!< LPTIM1 Alternate Function mapping */
#define GPIO_AF1_TIM1 ((uint8_t)0x01) /*!< TIM1 Alternate Function mapping */
#define GPIO_AF1_TIM2 ((uint8_t)0x01) /*!< TIM2 Alternate Function mapping */
#define GPIO_AF1_LPTIM1 ((uint8_t)0x01) /*!< LPTIM1 Alternate Function mapping */

/**
* @brief AF 2 selection
*/
#define GPIO_AF2_TIM2 ((uint8_t)0x02) /*!< TIM2 Alternate Function mapping */
#define GPIO_AF2_TIM1 ((uint8_t)0x02) /*!< TIM1 Alternate Function mapping */
#define GPIO_AF2_TIM2 ((uint8_t)0x02) /*!< TIM2 Alternate Function mapping */
#define GPIO_AF2_TIM1 ((uint8_t)0x02) /*!< TIM1 Alternate Function mapping */

/**
* @brief AF 3 selection
*/
#define GPIO_AF3_SAI1 ((uint8_t)0x03) /*!< SAI1_CK1 Alternate Function mapping */
#define GPIO_AF3_SAI1 ((uint8_t)0x03) /*!< SAI1_CK1 Alternate Function mapping */
#define GPIO_AF3_SPI2 ((uint8_t)0x03) /*!< SPI2 Alternate Function mapping */
#define GPIO_AF3_TIM1 ((uint8_t)0x03) /*!< TIM1 Alternate Function mapping */

/**
* @brief AF 4 selection
*/
#define GPIO_AF4_I2C1 ((uint8_t)0x04) /*!< I2C1 Alternate Function mapping */
#define GPIO_AF4_I2C3 ((uint8_t)0x04) /*!< I2C3 Alternate Function mapping */
#define GPIO_AF4_I2C3 ((uint8_t)0x04) /*!< I2C3 Alternate Function mapping */

/**
* @brief AF 5 selection
Expand Down Expand Up @@ -135,13 +135,13 @@ extern "C" {
/**
* @brief AF 7 selection
*/
#define GPIO_AF7_USART1 ((uint8_t)0x07) /*!< USART1 Alternate Function mapping */
#define GPIO_AF7_USART1 ((uint8_t)0x07) /*!< USART1 Alternate Function mapping */

/**
* @brief AF 8 selection
*/
#define GPIO_AF8_LPUART1 ((uint8_t)0x08) /*!< LPUART1 Alternate Function mapping */
#define GPIO_AF8_IR ((uint8_t)0x08) /*!< IR Alternate Function mapping */
#define GPIO_AF8_LPUART1 ((uint8_t)0x08) /*!< LPUART1 Alternate Function mapping */
#define GPIO_AF8_IR ((uint8_t)0x08) /*!< IR Alternate Function mapping */

/**
* @brief AF 9 selection
Expand Down Expand Up @@ -187,7 +187,7 @@ extern "C" {

#define IS_GPIO_AF(AF) ((AF) <= (uint8_t)0x0f)

#endif
#endif /* STM32WB55xx || STM32WB5Mxx */


#if defined (STM32WB50xx)
Expand Down Expand Up @@ -285,12 +285,12 @@ extern "C" {
/**
* @brief AF 15 selection
*/
#define GPIO_AF15_EVENTOUT ((uint8_t)0x0f) /*!< EVENTOUT Alternate Function mapping */
#define GPIO_AF15_EVENTOUT ((uint8_t)0x0f) /*!< EVENTOUT Alternate Function mapping */

#define IS_GPIO_AF(AF) (((AF) <= (uint8_t)0x0F)\
&& ((AF) != (uint8_t)0x09) && ((AF) != (uint8_t)0x0A) && ((AF) != (uint8_t)0x0B) && ((AF) != (uint8_t)0x0D))

#endif
#endif /* STM32WB50xx */


#if defined (STM32WB35xx)
Expand Down Expand Up @@ -413,7 +413,7 @@ extern "C" {

#define IS_GPIO_AF(AF) (((AF) <= (uint8_t)0x0F) && ((AF) != (uint8_t)0x0B) && ((AF) != (uint8_t)0x0D))

#endif
#endif /* STM32WB35xx */

#if defined (STM32WB30xx)
/**
Expand Down Expand Up @@ -520,7 +520,7 @@ extern "C" {
#define IS_GPIO_AF(AF) (((AF) <= (uint8_t)0x0F)\
&& ((AF) != (uint8_t)0x0A) && ((AF) != (uint8_t)0x0B) && ((AF) != (uint8_t)0x0D))

#endif
#endif /* STM32WB30xx */

#if defined (STM32WB15xx) || defined (STM32WB10xx) || defined (STM32WB1Mxx)
/**
Expand Down Expand Up @@ -625,7 +625,7 @@ extern "C" {
#define GPIO_AF15_EVENTOUT ((uint8_t)0x0f) /*!< EVENTOUT Alternate Function mapping */

#define IS_GPIO_AF(AF) ((AF) <= (uint8_t)0x0f)
#endif
#endif /* STM32WB15xx || STM32WB10xx || STM32WB1Mxx */

/**
* @}
Expand Down Expand Up @@ -654,7 +654,7 @@ extern "C" {
((__GPIOx__) == (GPIOB))? 1uL :\
((__GPIOx__) == (GPIOC))? 2uL :\
((__GPIOx__) == (GPIOE))? 4uL : 7uL)
#endif
#endif /* STM32WB55xx || STM32WB5Mxx */
/**
* @}
*/
Expand Down
11 changes: 8 additions & 3 deletions system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_i2c.h
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Expand Up @@ -203,10 +203,13 @@ typedef struct __I2C_HandleTypeDef
HAL_StatusTypeDef(*XferISR)(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources);
/*!< I2C transfer IRQ handler function pointer */

#if defined(HAL_DMA_MODULE_ENABLED)
DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */

DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */

#endif /*HAL_DMA_MODULE_ENABLED*/

HAL_LockTypeDef Lock; /*!< I2C locking object */

__IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */
Expand Down Expand Up @@ -661,6 +664,7 @@ HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c);
HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c);
HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress);

#if defined(HAL_DMA_MODULE_ENABLED)
/******* Non-Blocking mode: DMA */
HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
uint16_t Size);
Expand All @@ -681,6 +685,7 @@ HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_
uint32_t XferOptions);
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size,
uint32_t XferOptions);
#endif /*HAL_DMA_MODULE_ENABLED*/
/**
* @}
*/
Expand Down Expand Up @@ -709,9 +714,9 @@ void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c);
* @{
*/
/* Peripheral State, Mode and Error functions *********************************/
HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c);
HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c);
uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
HAL_I2C_StateTypeDef HAL_I2C_GetState(const I2C_HandleTypeDef *hi2c);
HAL_I2C_ModeTypeDef HAL_I2C_GetMode(const I2C_HandleTypeDef *hi2c);
uint32_t HAL_I2C_GetError(const I2C_HandleTypeDef *hi2c);

/**
* @}
Expand Down
32 changes: 18 additions & 14 deletions system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_ipcc.h
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Expand Up @@ -22,7 +22,7 @@

#ifdef __cplusplus
extern "C" {
#endif
#endif /* __cplusplus */

/* Includes ------------------------------------------------------------------*/
#include "stm32wbxx_hal_def.h"
Expand Down Expand Up @@ -199,8 +199,8 @@ typedef void ChannelCb(IPCC_HandleTypeDef *hipcc, uint32_t ChannelIndex, IPCC_CH

/* Initialization and de-initialization functions *******************************/
/** @defgroup IPCC_Exported_Functions_Group1 Initialization and deinitialization functions
* @{
*/
* @{
*/
HAL_StatusTypeDef HAL_IPCC_Init(IPCC_HandleTypeDef *hipcc);
HAL_StatusTypeDef HAL_IPCC_DeInit(IPCC_HandleTypeDef *hipcc);
void HAL_IPCC_MspInit(IPCC_HandleTypeDef *hipcc);
Expand All @@ -210,29 +210,33 @@ void HAL_IPCC_MspDeInit(IPCC_HandleTypeDef *hipcc);
*/

/** @defgroup IPCC_Exported_Functions_Group2 Communication functions
* @{
*/
* @{
*/
/* IO operation functions *****************************************************/
HAL_StatusTypeDef HAL_IPCC_ActivateNotification(IPCC_HandleTypeDef *hipcc, uint32_t ChannelIndex, IPCC_CHANNELDirTypeDef ChannelDir, ChannelCb cb);
HAL_StatusTypeDef HAL_IPCC_DeActivateNotification(IPCC_HandleTypeDef *hipcc, uint32_t ChannelIndex, IPCC_CHANNELDirTypeDef ChannelDir);
IPCC_CHANNELStatusTypeDef HAL_IPCC_GetChannelStatus(IPCC_HandleTypeDef const *const hipcc, uint32_t ChannelIndex, IPCC_CHANNELDirTypeDef ChannelDir);
HAL_StatusTypeDef HAL_IPCC_NotifyCPU(IPCC_HandleTypeDef const *const hipcc, uint32_t ChannelIndex, IPCC_CHANNELDirTypeDef ChannelDir);
HAL_StatusTypeDef HAL_IPCC_ActivateNotification(IPCC_HandleTypeDef *hipcc, uint32_t ChannelIndex,
IPCC_CHANNELDirTypeDef ChannelDir, ChannelCb cb);
HAL_StatusTypeDef HAL_IPCC_DeActivateNotification(IPCC_HandleTypeDef *hipcc, uint32_t ChannelIndex,
IPCC_CHANNELDirTypeDef ChannelDir);
IPCC_CHANNELStatusTypeDef HAL_IPCC_GetChannelStatus(IPCC_HandleTypeDef const *const hipcc,
uint32_t ChannelIndex, IPCC_CHANNELDirTypeDef ChannelDir);
HAL_StatusTypeDef HAL_IPCC_NotifyCPU(IPCC_HandleTypeDef const *const hipcc, uint32_t ChannelIndex,
IPCC_CHANNELDirTypeDef ChannelDir);
/**
* @}
*/

/** @defgroup IPCC_Exported_Functions_Group3 Peripheral State and Error functions
* @{
*/
* @{
*/
/* Peripheral State and Error functions ****************************************/
HAL_IPCC_StateTypeDef HAL_IPCC_GetState(IPCC_HandleTypeDef const *const hipcc);
/**
* @}
*/

/** @defgroup IPCC_IRQ_Handler_and_Callbacks Peripheral IRQ Handler and Callbacks
* @{
*/
* @{
*/
/* IRQHandler and Callbacks used in non blocking modes ************************/
void HAL_IPCC_TX_IRQHandler(IPCC_HandleTypeDef *const hipcc);
void HAL_IPCC_RX_IRQHandler(IPCC_HandleTypeDef *const hipcc);
Expand All @@ -257,7 +261,7 @@ void HAL_IPCC_RxCallback(IPCC_HandleTypeDef *hipcc, uint32_t ChannelIndex, IPCC_

#ifdef __cplusplus
}
#endif
#endif /* __cplusplus */

#endif /* STM32WBxx_HAL_IPCC_H */

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