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spi: Add delay before disabling SPI to avoid truncated clock/data signals #1506

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Merged
merged 1 commit into from
Sep 24, 2021

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ABOSTM
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@ABOSTM ABOSTM commented Sep 23, 2021

Summary
spi: Add delay before disabling SPI to avoid truncated clock/data signals

Add a delay before disabling SPI otherwise last-bit/last-clock
may be truncated.
See #1294
Computed delay is half SPI clock.

Fixes #1294

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ABOSTM commented Sep 23, 2021

cc/ @greiman @mzhboy

@fpistm fpistm added this to the 2.1.0 milestone Sep 23, 2021
…nals

Add a delay before disabling SPI otherwise last-bit/last-clock
may be truncated.
See stm32duino#1294
Computed delay is half SPI clock.

Signed-off-by: Alexandre Bourdiol <[email protected]>
@ABOSTM ABOSTM force-pushed the SPI_TRUNCATED_SIGNALS branch from 1a00a35 to c12ba00 Compare September 23, 2021 14:25
@fpistm fpistm merged commit ba1d5ee into stm32duino:master Sep 24, 2021
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NUCLEO-H743ZI2 SPI.transfer() fails with SCLK less than 500 kHz in 1.9.0
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