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Updated HAL drivers and CMSIS for STM32F2/F4/L4 #141

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Merged
merged 8 commits into from
Nov 7, 2017
Merged

Updated HAL drivers and CMSIS for STM32F2/F4/L4 #141

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2d35861
Updated STM32F2xx HAL Drivers to v1.2.2
fpistm Oct 26, 2017
cf56ef1
Updated STM32F2xx CMSIS to v2.2.1
fpistm Oct 26, 2017
0793594
Unix2dos STM32L4xx HAL Drivers files
fpistm Oct 26, 2017
5162e90
Updated STM32L4xx HAL Drivers to v1.8.1
fpistm Oct 26, 2017
3f1e7e3
Unix2dos STM32L4xx CMSIS files
fpistm Oct 26, 2017
48e6615
Updated STM32L4xx CMSIS to v1.4.1
fpistm Oct 26, 2017
ed59a1d
Updated STM32F4xx HAL Drivers to v1.7.2
fpistm Oct 26, 2017
894eb91
Updated STM32F4xx CMSIS to v2.6.2
fpistm Oct 26, 2017
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3 changes: 1 addition & 2 deletions system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f205xx.h
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Expand Up @@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f205xx.h
* @author MCD Application Team
* @version V2.2.0
* @date 17-March-2017
* @brief CMSIS STM32F205xx Device Peripheral Access Layer Header File.
* This file contains :
* - Data structures and the address mapping for all peripherals
Expand Down Expand Up @@ -84,6 +82,7 @@ typedef enum
{
/****** Cortex-M3 Processor Exceptions Numbers ****************************************************************/
NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
HardFault_IRQn = -13, /*!< 3 Hard Fault Interrupt */
MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
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3 changes: 1 addition & 2 deletions system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f207xx.h
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******************************************************************************
* @file stm32f207xx.h
* @author MCD Application Team
* @version V2.2.0
* @date 17-March-2017
* @brief CMSIS STM32F207xx Device Peripheral Access Layer Header File.
* This file contains :
* - Data structures and the address mapping for all peripherals
Expand Down Expand Up @@ -84,6 +82,7 @@ typedef enum
{
/****** Cortex-M3 Processor Exceptions Numbers ****************************************************************/
NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
HardFault_IRQn = -13, /*!< 3 Hard Fault Interrupt */
MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
Expand Down
5 changes: 1 addition & 4 deletions system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f215xx.h
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******************************************************************************
* @file stm32f215xx.h
* @author MCD Application Team
* @version V2.2.0
* @date 17-March-2017
* @brief CMSIS STM32F215xx Device Peripheral Access Layer Header File.
* This file contains :
* - Data structures and the address mapping for all peripherals
Expand Down Expand Up @@ -84,6 +82,7 @@ typedef enum
{
/****** Cortex-M3 Processor Exceptions Numbers ****************************************************************/
NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
HardFault_IRQn = -13, /*!< 3 Hard Fault Interrupt */
MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
Expand Down Expand Up @@ -986,7 +985,6 @@ USB_OTG_HostChannelTypeDef;
/*!< AHB2 peripherals */
#define CRYP_BASE (AHB2PERIPH_BASE + 0x60000U)
#define HASH_BASE (AHB2PERIPH_BASE + 0x60400U)
#define HASH_DIGEST_BASE (AHB2PERIPH_BASE + 0x60710U)
#define RNG_BASE (AHB2PERIPH_BASE + 0x60800U)

/*!< FSMC Bankx registers base address */
Expand Down Expand Up @@ -1101,7 +1099,6 @@ USB_OTG_HostChannelTypeDef;
#define DMA2_Stream7 ((DMA_Stream_TypeDef *) DMA2_Stream7_BASE)
#define CRYP ((CRYP_TypeDef *) CRYP_BASE)
#define HASH ((HASH_TypeDef *) HASH_BASE)
#define HASH_DIGEST ((HASH_DIGEST_TypeDef *) HASH_DIGEST_BASE)
#define RNG ((RNG_TypeDef *) RNG_BASE)
#define FSMC_Bank1 ((FSMC_Bank1_TypeDef *) FSMC_Bank1_R_BASE)
#define FSMC_Bank1E ((FSMC_Bank1E_TypeDef *) FSMC_Bank1E_R_BASE)
Expand Down
5 changes: 1 addition & 4 deletions system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f217xx.h
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Expand Up @@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f217xx.h
* @author MCD Application Team
* @version V2.2.0
* @date 17-March-2017
* @brief CMSIS STM32F217xx Device Peripheral Access Layer Header File.
* This file contains :
* - Data structures and the address mapping for all peripherals
Expand Down Expand Up @@ -84,6 +82,7 @@ typedef enum
{
/****** Cortex-M3 Processor Exceptions Numbers ****************************************************************/
NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
HardFault_IRQn = -13, /*!< 3 Hard Fault Interrupt */
MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
Expand Down Expand Up @@ -1088,7 +1087,6 @@ USB_OTG_HostChannelTypeDef;
#define DCMI_BASE (AHB2PERIPH_BASE + 0x50000U)
#define CRYP_BASE (AHB2PERIPH_BASE + 0x60000U)
#define HASH_BASE (AHB2PERIPH_BASE + 0x60400U)
#define HASH_DIGEST_BASE (AHB2PERIPH_BASE + 0x60710U)
#define RNG_BASE (AHB2PERIPH_BASE + 0x60800U)

/*!< FSMC Bankx registers base address */
Expand Down Expand Up @@ -1205,7 +1203,6 @@ USB_OTG_HostChannelTypeDef;
#define DCMI ((DCMI_TypeDef *) DCMI_BASE)
#define CRYP ((CRYP_TypeDef *) CRYP_BASE)
#define HASH ((HASH_TypeDef *) HASH_BASE)
#define HASH_DIGEST ((HASH_DIGEST_TypeDef *) HASH_DIGEST_BASE)
#define RNG ((RNG_TypeDef *) RNG_BASE)
#define FSMC_Bank1 ((FSMC_Bank1_TypeDef *) FSMC_Bank1_R_BASE)
#define FSMC_Bank1E ((FSMC_Bank1E_TypeDef *) FSMC_Bank1E_R_BASE)
Expand Down
6 changes: 2 additions & 4 deletions system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h
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******************************************************************************
* @file stm32f2xx.h
* @author MCD Application Team
* @version V2.2.0
* @date 17-March-2017
* @brief CMSIS STM32F2xx Device Peripheral Access Layer Header File.
*
* The file is the unique include file that the application programmer
Expand Down Expand Up @@ -99,11 +97,11 @@
#endif /* USE_HAL_DRIVER */

/**
* @brief CMSIS Device version number V2.2.0
* @brief CMSIS Device version number V2.2.1
*/
#define __STM32F2xx_CMSIS_VERSION_MAIN (0x02U) /*!< [31:24] main version */
#define __STM32F2xx_CMSIS_VERSION_SUB1 (0x02U) /*!< [23:16] sub1 version */
#define __STM32F2xx_CMSIS_VERSION_SUB2 (0x00U) /*!< [15:8] sub2 version */
#define __STM32F2xx_CMSIS_VERSION_SUB2 (0x01U) /*!< [15:8] sub2 version */
#define __STM32F2xx_CMSIS_VERSION_RC (0x00U) /*!< [7:0] release candidate */
#define __STM32F2xx_CMSIS_VERSION ((__STM32F2xx_CMSIS_VERSION_MAIN << 24)\
|(__STM32F2xx_CMSIS_VERSION_SUB1 << 16)\
Expand Down
2 changes: 0 additions & 2 deletions system/Drivers/CMSIS/Device/ST/STM32F2xx/Include/system_stm32f2xx.h
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******************************************************************************
* @file system_stm32f2xx.h
* @author MCD Application Team
* @version V2.2.0
* @date 17-March-2017
* @brief CMSIS Cortex-M3 Device System Source File for STM32F2xx devices.
******************************************************************************
* @attention
Expand Down
4 changes: 2 additions & 2 deletions system/Drivers/CMSIS/Device/ST/STM32F2xx/Release_Notes.html
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2 changes: 0 additions & 2 deletions system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/startup_stm32f205xx.s
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******************************************************************************
* @file startup_stm32f205xx.s
* @author MCD Application Team
* @version V2.2.0
* @date 17-March-2017
* @brief STM32F205xx Devices vector table for Atollic TrueSTUDIO toolchain.
* This module performs:
* - Set the initial SP
Expand Down
2 changes: 0 additions & 2 deletions system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/startup_stm32f207xx.s
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******************************************************************************
* @file startup_stm32f207xx.s
* @author MCD Application Team
* @version V2.2.0
* @date 17-March-2017
* @brief STM32F207xx Devices vector table for Atollic TrueSTUDIO toolchain.
* This module performs:
* - Set the initial SP
Expand Down
2 changes: 0 additions & 2 deletions system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/startup_stm32f215xx.s
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******************************************************************************
* @file startup_stm32f215xx.s
* @author MCD Application Team
* @version V2.2.0
* @date 17-March-2017
* @brief STM32F215xx Devices vector table for Atollic TrueSTUDIO toolchain.
* This module performs:
* - Set the initial SP
Expand Down
2 changes: 0 additions & 2 deletions system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc/startup_stm32f217xx.s
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******************************************************************************
* @file startup_stm32f217xx.s
* @author MCD Application Team
* @version V2.2.0
* @date 17-March-2017
* @brief STM32F217xx Devices vector table for Atollic TrueSTUDIO toolchain.
* This module performs:
* - Set the initial SP
Expand Down
2 changes: 0 additions & 2 deletions system/Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/system_stm32f2xx.c
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******************************************************************************
* @file system_stm32f2xx.c
* @author MCD Application Team
* @version V2.2.0
* @date 17-March-2017
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
*
* This file provides two functions and one global variable to be called from
Expand Down
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