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Updated STM32F4xx HAL Drivers to v1.7.2
Included in STM32CubeF4 FW V1.17.0 Signed-off-by: Frederic.Pillon <[email protected]>
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‎system/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h

+338-242
Large diffs are not rendered by default.

‎system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32_assert_template.h

+1-3
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,6 @@
22
******************************************************************************
33
* @file stm32_assert.h
44
* @author MCD Application Team
5-
* @version V1.7.1
6-
* @date 14-April-2017
75
* @brief STM32 assert template file.
86
* This file should be copied to the application folder and renamed
97
* to stm32_assert.h.
@@ -52,7 +50,7 @@
5250
#ifdef USE_FULL_ASSERT
5351
/**
5452
* @brief The assert_param macro is used for function's parameters check.
55-
* @param expr: If expr is false, it calls assert_failed function
53+
* @param expr If expr is false, it calls assert_failed function
5654
* which reports the name of the source file and the source
5755
* line number of the call that failed.
5856
* If expr is true, it returns no value.

‎system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h

-2
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,6 @@
22
******************************************************************************
33
* @file stm32f4xx_hal.h
44
* @author MCD Application Team
5-
* @version V1.7.1
6-
* @date 14-April-2017
75
* @brief This file contains all the functions prototypes for the HAL
86
* module driver.
97
******************************************************************************

‎system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h

+35-37
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,6 @@
22
******************************************************************************
33
* @file stm32f4xx_hal_adc.h
44
* @author MCD Application Team
5-
* @version V1.7.1
6-
* @date 14-April-2017
75
* @brief Header file containing functions prototypes of ADC HAL library.
86
******************************************************************************
97
* @attention
@@ -455,60 +453,60 @@ typedef struct
455453
*/
456454

457455
/** @brief Reset ADC handle state
458-
* @param __HANDLE__: ADC handle
456+
* @param __HANDLE__ ADC handle
459457
* @retval None
460458
*/
461459
#define __HAL_ADC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_ADC_STATE_RESET)
462460

463461
/**
464462
* @brief Enable the ADC peripheral.
465-
* @param __HANDLE__: ADC handle
463+
* @param __HANDLE__ ADC handle
466464
* @retval None
467465
*/
468466
#define __HAL_ADC_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR2 |= ADC_CR2_ADON)
469467

470468
/**
471469
* @brief Disable the ADC peripheral.
472-
* @param __HANDLE__: ADC handle
470+
* @param __HANDLE__ ADC handle
473471
* @retval None
474472
*/
475473
#define __HAL_ADC_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= ~ADC_CR2_ADON)
476474

477475
/**
478476
* @brief Enable the ADC end of conversion interrupt.
479-
* @param __HANDLE__: specifies the ADC Handle.
480-
* @param __INTERRUPT__: ADC Interrupt.
477+
* @param __HANDLE__ specifies the ADC Handle.
478+
* @param __INTERRUPT__ ADC Interrupt.
481479
* @retval None
482480
*/
483481
#define __HAL_ADC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR1) |= (__INTERRUPT__))
484482

485483
/**
486484
* @brief Disable the ADC end of conversion interrupt.
487-
* @param __HANDLE__: specifies the ADC Handle.
488-
* @param __INTERRUPT__: ADC interrupt.
485+
* @param __HANDLE__ specifies the ADC Handle.
486+
* @param __INTERRUPT__ ADC interrupt.
489487
* @retval None
490488
*/
491489
#define __HAL_ADC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR1) &= ~(__INTERRUPT__))
492490

493491
/** @brief Check if the specified ADC interrupt source is enabled or disabled.
494-
* @param __HANDLE__: specifies the ADC Handle.
495-
* @param __INTERRUPT__: specifies the ADC interrupt source to check.
492+
* @param __HANDLE__ specifies the ADC Handle.
493+
* @param __INTERRUPT__ specifies the ADC interrupt source to check.
496494
* @retval The new state of __IT__ (TRUE or FALSE).
497495
*/
498496
#define __HAL_ADC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__))
499497

500498
/**
501499
* @brief Clear the ADC's pending flags.
502-
* @param __HANDLE__: specifies the ADC Handle.
503-
* @param __FLAG__: ADC flag.
500+
* @param __HANDLE__ specifies the ADC Handle.
501+
* @param __FLAG__ ADC flag.
504502
* @retval None
505503
*/
506504
#define __HAL_ADC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = ~(__FLAG__))
507505

508506
/**
509507
* @brief Get the selected ADC's flag status.
510-
* @param __HANDLE__: specifies the ADC Handle.
511-
* @param __FLAG__: ADC flag.
508+
* @param __HANDLE__ specifies the ADC Handle.
509+
* @param __FLAG__ ADC flag.
512510
* @retval None
513511
*/
514512
#define __HAL_ADC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
@@ -616,7 +614,7 @@ uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc);
616614

617615
/**
618616
* @brief Verification of ADC state: enabled or disabled
619-
* @param __HANDLE__: ADC handle
617+
* @param __HANDLE__ ADC handle
620618
* @retval SET (ADC enabled) or RESET (ADC disabled)
621619
*/
622620
#define ADC_IS_ENABLE(__HANDLE__) \
@@ -626,7 +624,7 @@ uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc);
626624
/**
627625
* @brief Test if conversion trigger of regular group is software start
628626
* or external trigger.
629-
* @param __HANDLE__: ADC handle
627+
* @param __HANDLE__ ADC handle
630628
* @retval SET (software start) or RESET (external trigger)
631629
*/
632630
#define ADC_IS_SOFTWARE_START_REGULAR(__HANDLE__) \
@@ -635,7 +633,7 @@ uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc);
635633
/**
636634
* @brief Test if conversion trigger of injected group is software start
637635
* or external trigger.
638-
* @param __HANDLE__: ADC handle
636+
* @param __HANDLE__ ADC handle
639637
* @retval SET (software start) or RESET (external trigger)
640638
*/
641639
#define ADC_IS_SOFTWARE_START_INJECTED(__HANDLE__) \
@@ -652,7 +650,7 @@ uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc);
652650

653651
/**
654652
* @brief Clear ADC error code (set it to error code: "no error")
655-
* @param __HANDLE__: ADC handle
653+
* @param __HANDLE__ ADC handle
656654
* @retval None
657655
*/
658656
#define ADC_CLEAR_ERRORCODE(__HANDLE__) \
@@ -742,89 +740,89 @@ uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc);
742740

743741
/**
744742
* @brief Set ADC Regular channel sequence length.
745-
* @param _NbrOfConversion_: Regular channel sequence length.
743+
* @param _NbrOfConversion_ Regular channel sequence length.
746744
* @retval None
747745
*/
748746
#define ADC_SQR1(_NbrOfConversion_) (((_NbrOfConversion_) - (uint8_t)1U) << 20U)
749747

750748
/**
751749
* @brief Set the ADC's sample time for channel numbers between 10 and 18.
752-
* @param _SAMPLETIME_: Sample time parameter.
753-
* @param _CHANNELNB_: Channel number.
750+
* @param _SAMPLETIME_ Sample time parameter.
751+
* @param _CHANNELNB_ Channel number.
754752
* @retval None
755753
*/
756754
#define ADC_SMPR1(_SAMPLETIME_, _CHANNELNB_) ((_SAMPLETIME_) << (3U * (((uint32_t)((uint16_t)(_CHANNELNB_))) - 10U)))
757755

758756
/**
759757
* @brief Set the ADC's sample time for channel numbers between 0 and 9.
760-
* @param _SAMPLETIME_: Sample time parameter.
761-
* @param _CHANNELNB_: Channel number.
758+
* @param _SAMPLETIME_ Sample time parameter.
759+
* @param _CHANNELNB_ Channel number.
762760
* @retval None
763761
*/
764762
#define ADC_SMPR2(_SAMPLETIME_, _CHANNELNB_) ((_SAMPLETIME_) << (3U * ((uint32_t)((uint16_t)(_CHANNELNB_)))))
765763

766764
/**
767765
* @brief Set the selected regular channel rank for rank between 1 and 6.
768-
* @param _CHANNELNB_: Channel number.
769-
* @param _RANKNB_: Rank number.
766+
* @param _CHANNELNB_ Channel number.
767+
* @param _RANKNB_ Rank number.
770768
* @retval None
771769
*/
772770
#define ADC_SQR3_RK(_CHANNELNB_, _RANKNB_) (((uint32_t)((uint16_t)(_CHANNELNB_))) << (5U * ((_RANKNB_) - 1U)))
773771

774772
/**
775773
* @brief Set the selected regular channel rank for rank between 7 and 12.
776-
* @param _CHANNELNB_: Channel number.
777-
* @param _RANKNB_: Rank number.
774+
* @param _CHANNELNB_ Channel number.
775+
* @param _RANKNB_ Rank number.
778776
* @retval None
779777
*/
780778
#define ADC_SQR2_RK(_CHANNELNB_, _RANKNB_) (((uint32_t)((uint16_t)(_CHANNELNB_))) << (5U * ((_RANKNB_) - 7U)))
781779

782780
/**
783781
* @brief Set the selected regular channel rank for rank between 13 and 16.
784-
* @param _CHANNELNB_: Channel number.
785-
* @param _RANKNB_: Rank number.
782+
* @param _CHANNELNB_ Channel number.
783+
* @param _RANKNB_ Rank number.
786784
* @retval None
787785
*/
788786
#define ADC_SQR1_RK(_CHANNELNB_, _RANKNB_) (((uint32_t)((uint16_t)(_CHANNELNB_))) << (5U * ((_RANKNB_) - 13U)))
789787

790788
/**
791789
* @brief Enable ADC continuous conversion mode.
792-
* @param _CONTINUOUS_MODE_: Continuous mode.
790+
* @param _CONTINUOUS_MODE_ Continuous mode.
793791
* @retval None
794792
*/
795793
#define ADC_CR2_CONTINUOUS(_CONTINUOUS_MODE_) ((_CONTINUOUS_MODE_) << 1U)
796794

797795
/**
798796
* @brief Configures the number of discontinuous conversions for the regular group channels.
799-
* @param _NBR_DISCONTINUOUSCONV_: Number of discontinuous conversions.
797+
* @param _NBR_DISCONTINUOUSCONV_ Number of discontinuous conversions.
800798
* @retval None
801799
*/
802-
#define ADC_CR1_DISCONTINUOUS(_NBR_DISCONTINUOUSCONV_) (((_NBR_DISCONTINUOUSCONV_) - 1U) << POSITION_VAL(ADC_CR1_DISCNUM))
800+
#define ADC_CR1_DISCONTINUOUS(_NBR_DISCONTINUOUSCONV_) (((_NBR_DISCONTINUOUSCONV_) - 1U) << ADC_CR1_DISCNUM_Pos)
803801

804802
/**
805803
* @brief Enable ADC scan mode.
806-
* @param _SCANCONV_MODE_: Scan conversion mode.
804+
* @param _SCANCONV_MODE_ Scan conversion mode.
807805
* @retval None
808806
*/
809807
#define ADC_CR1_SCANCONV(_SCANCONV_MODE_) ((_SCANCONV_MODE_) << 8U)
810808

811809
/**
812810
* @brief Enable the ADC end of conversion selection.
813-
* @param _EOCSelection_MODE_: End of conversion selection mode.
811+
* @param _EOCSelection_MODE_ End of conversion selection mode.
814812
* @retval None
815813
*/
816814
#define ADC_CR2_EOCSelection(_EOCSelection_MODE_) ((_EOCSelection_MODE_) << 10U)
817815

818816
/**
819817
* @brief Enable the ADC DMA continuous request.
820-
* @param _DMAContReq_MODE_: DMA continuous request mode.
818+
* @param _DMAContReq_MODE_ DMA continuous request mode.
821819
* @retval None
822820
*/
823821
#define ADC_CR2_DMAContReq(_DMAContReq_MODE_) ((_DMAContReq_MODE_) << 9U)
824822

825823
/**
826824
* @brief Return resolution bits in CR1 register.
827-
* @param __HANDLE__: ADC handle
825+
* @param __HANDLE__ ADC handle
828826
* @retval None
829827
*/
830828
#define ADC_GET_RESOLUTION(__HANDLE__) (((__HANDLE__)->Instance->CR1) & ADC_CR1_RES)

‎system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc_ex.h

+10-8
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,6 @@
22
******************************************************************************
33
* @file stm32f4xx_hal_adc_ex.h
44
* @author MCD Application Team
5-
* @version V1.7.1
6-
* @date 14-April-2017
75
* @brief Header file of ADC HAL module.
86
******************************************************************************
97
* @attention
@@ -232,10 +230,14 @@ typedef struct
232230
#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
233231
defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || \
234232
defined(STM32F410Rx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || \
235-
defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
233+
defined(STM32F412Cx)
236234
#define ADC_CHANNEL_TEMPSENSOR ((uint32_t)ADC_CHANNEL_16)
237235
#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F410xx || STM32F412Zx ||
238-
STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
236+
STM32F412Vx || STM32F412Rx || STM32F412Cx */
237+
238+
#if defined(STM32F413xx) || defined(STM32F423xx)
239+
#define ADC_CHANNEL_TEMPSENSOR ((uint32_t)ADC_CHANNEL_18)
240+
#endif /* STM32F413xx || STM32F423xx */
239241

240242
#if defined(STM32F411xE) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
241243
defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
@@ -377,17 +379,17 @@ HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_
377379

378380
/**
379381
* @brief Set the selected injected Channel rank.
380-
* @param _CHANNELNB_: Channel number.
381-
* @param _RANKNB_: Rank number.
382-
* @param _JSQR_JL_: Sequence length.
382+
* @param _CHANNELNB_ Channel number.
383+
* @param _RANKNB_ Rank number.
384+
* @param _JSQR_JL_ Sequence length.
383385
* @retval None
384386
*/
385387
#define ADC_JSQR(_CHANNELNB_, _RANKNB_, _JSQR_JL_) (((uint32_t)((uint16_t)(_CHANNELNB_))) << (5U * (uint8_t)(((_RANKNB_) + 3U) - (_JSQR_JL_))))
386388

387389
/**
388390
* @brief Defines if the selected ADC is within ADC common register ADC123 or ADC1
389391
* if available (ADC2, ADC3 availability depends on STM32 product)
390-
* @param __HANDLE__: ADC handle
392+
* @param __HANDLE__ ADC handle
391393
* @retval Common control register ADC123 or ADC1
392394
*/
393395
#if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F429xx) || defined(STM32F437xx) || defined(STM32F439xx) || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)

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