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Closed
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Add setClockDivider. Fix polarity. #30

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1c16368
Inital theory working
Jul 9, 2019
a8924f3
Whitespace change to iomaster.cpp
Jul 9, 2019
0c73c84
Rename var to emphasize bitorder not byteorder
Jul 9, 2019
a8af4a2
Pass bitorder to ap3_iomaster
Jul 9, 2019
8bd660a
spiClockDivider and bit polarity now working.
nseidle Jul 10, 2019
612f0f6
Use the HAL to control LSB.
nseidle Jul 10, 2019
39bf012
Merge branch 'master' into spiClockDiv2
oclyke Jul 10, 2019
eeb5946
Update .gitignore
oclyke Jul 26, 2019
bfcf358
Merge branch 'master' into spiClockDiv2
oclyke Jul 26, 2019
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19 changes: 8 additions & 11 deletions cores/arduino/ard_sup/ap3_iomaster.h
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Original file line number Diff line number Diff line change
Expand Up @@ -28,24 +28,21 @@ SOFTWARE.
#include "Arduino.h"
#include "ap3_iomaster_types.h"

class IOMaster {
class IOMaster
{
private:
protected:
uint8_t _instance;
void* _handle;
uint8_t _instance;
void *_handle;
am_hal_iom_config_t _config;

public:
IOMaster(uint8_t instance);
ap3_err_t initialize( void );
ap3_err_t initialize(am_hal_iom_config_t config);
ap3_err_t deinitialize( void );
ap3_err_t initialize(BitOrder bitOrder);
ap3_err_t initialize(am_hal_iom_config_t config, BitOrder bitOrder);
ap3_err_t deinitialize(void);
};



ap3_err_t ap3_iom_pad_funcsel( uint8_t instance, ap3_iom_pad_type_e type, ap3_gpio_pad_t* pad, uint8_t* funcsel );


ap3_err_t ap3_iom_pad_funcsel(uint8_t instance, ap3_iom_pad_type_e type, ap3_gpio_pad_t *pad, uint8_t *funcsel);

#endif // _AP3_IOMASTER_H_
323 changes: 226 additions & 97 deletions cores/arduino/ard_sup/iomaster/ap3_iomaster.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -20,137 +20,266 @@ OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
*/


#include "ap3_iomaster.h"

IOMaster::IOMaster(uint8_t instance){
IOMaster::IOMaster(uint8_t instance)
{
_instance = instance;
}

ap3_err_t IOMaster::initialize( void ){
return initialize(_config);
ap3_err_t IOMaster::initialize(BitOrder bitOrder)
{
return initialize(_config, bitOrder);
}

ap3_err_t IOMaster::initialize(am_hal_iom_config_t config){
ap3_err_t IOMaster::initialize(am_hal_iom_config_t config, BitOrder bitOrder)
{
uint32_t retVal32 = 0;
_config = config;

am_hal_iom_disable(_handle);
am_hal_iom_uninitialize(_handle);

retVal32 = am_hal_iom_initialize(_instance, &_handle);
if (retVal32 != AM_HAL_STATUS_SUCCESS){ return AP3_ERR; }
if (retVal32 != AM_HAL_STATUS_SUCCESS)
{
return AP3_ERR;
}

retVal32 = am_hal_iom_power_ctrl(_handle, AM_HAL_SYSCTRL_WAKE, false);
if (retVal32 != AM_HAL_STATUS_SUCCESS){ return AP3_ERR; }

if (retVal32 != AM_HAL_STATUS_SUCCESS)
{
return AP3_ERR;
}

retVal32 = am_hal_iom_configure(_handle, &_config);
if (retVal32 != AM_HAL_STATUS_SUCCESS){ return AP3_ERR; }
if (retVal32 != AM_HAL_STATUS_SUCCESS)
{
return AP3_ERR;
}

retVal32 = am_hal_iom_enable(_handle);
if (retVal32 != AM_HAL_STATUS_SUCCESS){ return AP3_ERR; }
if (retVal32 != AM_HAL_STATUS_SUCCESS)
{
return AP3_ERR;
}

//Arduino defines LSBFIRST as 0, Ambiq HAL defines this bit as 1
//So we invert
uint8_t temp = (bitOrder ? 0 : 1);
retVal32 = am_hal_iom_control(_handle, AM_HAL_IOM_REQ_SPI_LSB, &temp);
if (retVal32 != AM_HAL_STATUS_SUCCESS)
{
return AP3_ERR;
}

return AP3_OK;

// Configure the IOM pins. (Must be done by the inherited classes [this is just a reminder])
}

ap3_err_t IOMaster::deinitialize( void ){
ap3_err_t IOMaster::deinitialize(void)
{
uint32_t retVal32 = 0;

retVal32 = am_hal_iom_disable(_handle);
if( retVal32 != AM_HAL_STATUS_SUCCESS){ return AP3_ERR; }
if (retVal32 != AM_HAL_STATUS_SUCCESS)
{
return AP3_ERR;
}

retVal32 = am_hal_iom_uninitialize(_handle);
if( retVal32 != AM_HAL_STATUS_SUCCESS){ return AP3_ERR; }
if (retVal32 != AM_HAL_STATUS_SUCCESS)
{
return AP3_ERR;
}

return AP3_OK;
}


ap3_err_t ap3_iom_pad_funcsel( uint8_t instance, ap3_iom_pad_type_e type, ap3_gpio_pad_t* pad, uint8_t* funcsel){
ap3_err_t ap3_iom_pad_funcsel(uint8_t instance, ap3_iom_pad_type_e type, ap3_gpio_pad_t *pad, uint8_t *funcsel)
{
ap3_err_t retval = AP3_OK;

switch( instance ){
case 0 :
switch( type ){
case AP3_IOM_I2C_SCL : *pad = 5; *funcsel = AM_HAL_PIN_5_M0SCL; break;
case AP3_IOM_I2C_SDA : *pad = 6; *funcsel = AM_HAL_PIN_6_M0SDAWIR3; break;
case AP3_IOM_SPI_SCLK : *pad = 5; *funcsel = AM_HAL_PIN_5_M0SCK; break;
case AP3_IOM_SPI_MOSI : *pad = 7; *funcsel = AM_HAL_PIN_7_M0MOSI; break;
case AP3_IOM_SPI_MISO : *pad = 6; *funcsel = AM_HAL_PIN_6_M0MISO; break;
default :
goto invalid_args;
break;
}
break;

case 1 :
switch( type ){
case AP3_IOM_I2C_SCL : *pad = 8; *funcsel = AM_HAL_PIN_8_M1SCL; break;
case AP3_IOM_I2C_SDA : *pad = 9; *funcsel = AM_HAL_PIN_9_M1SDAWIR3; break;
case AP3_IOM_SPI_SCLK : *pad = 8; *funcsel = AM_HAL_PIN_8_M1SCK; break;
case AP3_IOM_SPI_MOSI : *pad = 10; *funcsel = AM_HAL_PIN_10_M1MOSI; break;
case AP3_IOM_SPI_MISO : *pad = 9; *funcsel = AM_HAL_PIN_9_M1MISO; break;
default :
goto invalid_args;
break;
}
break;

case 2 :
switch( type ){
case AP3_IOM_I2C_SCL : *pad = 27; *funcsel = AM_HAL_PIN_27_M2SCL; break;
case AP3_IOM_I2C_SDA : *pad = 25; *funcsel = AM_HAL_PIN_25_M2SDAWIR3; break;
case AP3_IOM_SPI_SCLK : *pad = 27; *funcsel = AM_HAL_PIN_27_M2SCK; break;
case AP3_IOM_SPI_MOSI : *pad = 28; *funcsel = AM_HAL_PIN_28_M2MOSI; break;
case AP3_IOM_SPI_MISO : *pad = 25; *funcsel = AM_HAL_PIN_25_M2MISO; break;
default :
goto invalid_args;
break;
}
break;

case 3 :
switch( type ){
case AP3_IOM_I2C_SCL : *pad = 42; *funcsel = AM_HAL_PIN_42_M3SCL; break;
case AP3_IOM_I2C_SDA : *pad = 43; *funcsel = AM_HAL_PIN_43_M3SDAWIR3; break;
case AP3_IOM_SPI_SCLK : *pad = 42; *funcsel = AM_HAL_PIN_42_M3SCK; break;
case AP3_IOM_SPI_MOSI : *pad = 38; *funcsel = AM_HAL_PIN_38_M3MOSI; break;
case AP3_IOM_SPI_MISO : *pad = 43; *funcsel = AM_HAL_PIN_43_M3MISO; break;
default :
goto invalid_args;
break;
}
break;

case 4 :
switch( type ){
case AP3_IOM_I2C_SCL : *pad = 39; *funcsel = AM_HAL_PIN_39_M4SCL; break;
case AP3_IOM_I2C_SDA : *pad = 40; *funcsel = AM_HAL_PIN_40_M4SDAWIR3; break;
case AP3_IOM_SPI_SCLK : *pad = 39; *funcsel = AM_HAL_PIN_39_M4SCK; break;
case AP3_IOM_SPI_MOSI : *pad = 44; *funcsel = AM_HAL_PIN_44_M4MOSI; break;
case AP3_IOM_SPI_MISO : *pad = 40; *funcsel = AM_HAL_PIN_40_M4MISO; break;
default :
goto invalid_args;
break;
}
break;

case 5 :
switch( type ){
case AP3_IOM_I2C_SCL : *pad = 48; *funcsel = AM_HAL_PIN_48_M5SCL; break;
case AP3_IOM_I2C_SDA : *pad = 49; *funcsel = AM_HAL_PIN_49_M5SDAWIR3; break;
case AP3_IOM_SPI_SCLK : *pad = 48; *funcsel = AM_HAL_PIN_48_M5SCK; break;
case AP3_IOM_SPI_MOSI : *pad = 47; *funcsel = AM_HAL_PIN_47_M5MOSI; break;
case AP3_IOM_SPI_MISO : *pad = 49; *funcsel = AM_HAL_PIN_49_M5MISO; break;
default :
goto invalid_args;
break;
}
break;

default :
switch (instance)
{
case 0:
switch (type)
{
case AP3_IOM_I2C_SCL:
*pad = 5;
*funcsel = AM_HAL_PIN_5_M0SCL;
break;
case AP3_IOM_I2C_SDA:
*pad = 6;
*funcsel = AM_HAL_PIN_6_M0SDAWIR3;
break;
case AP3_IOM_SPI_SCLK:
*pad = 5;
*funcsel = AM_HAL_PIN_5_M0SCK;
break;
case AP3_IOM_SPI_MOSI:
*pad = 7;
*funcsel = AM_HAL_PIN_7_M0MOSI;
break;
case AP3_IOM_SPI_MISO:
*pad = 6;
*funcsel = AM_HAL_PIN_6_M0MISO;
break;
default:
goto invalid_args;
break;
}
break;

case 1:
switch (type)
{
case AP3_IOM_I2C_SCL:
*pad = 8;
*funcsel = AM_HAL_PIN_8_M1SCL;
break;
case AP3_IOM_I2C_SDA:
*pad = 9;
*funcsel = AM_HAL_PIN_9_M1SDAWIR3;
break;
case AP3_IOM_SPI_SCLK:
*pad = 8;
*funcsel = AM_HAL_PIN_8_M1SCK;
break;
case AP3_IOM_SPI_MOSI:
*pad = 10;
*funcsel = AM_HAL_PIN_10_M1MOSI;
break;
case AP3_IOM_SPI_MISO:
*pad = 9;
*funcsel = AM_HAL_PIN_9_M1MISO;
break;
default:
goto invalid_args;
break;
}
break;

case 2:
switch (type)
{
case AP3_IOM_I2C_SCL:
*pad = 27;
*funcsel = AM_HAL_PIN_27_M2SCL;
break;
case AP3_IOM_I2C_SDA:
*pad = 25;
*funcsel = AM_HAL_PIN_25_M2SDAWIR3;
break;
case AP3_IOM_SPI_SCLK:
*pad = 27;
*funcsel = AM_HAL_PIN_27_M2SCK;
break;
case AP3_IOM_SPI_MOSI:
*pad = 28;
*funcsel = AM_HAL_PIN_28_M2MOSI;
break;
case AP3_IOM_SPI_MISO:
*pad = 25;
*funcsel = AM_HAL_PIN_25_M2MISO;
break;
default:
goto invalid_args;
break;
}
break;

case 3:
switch (type)
{
case AP3_IOM_I2C_SCL:
*pad = 42;
*funcsel = AM_HAL_PIN_42_M3SCL;
break;
case AP3_IOM_I2C_SDA:
*pad = 43;
*funcsel = AM_HAL_PIN_43_M3SDAWIR3;
break;
case AP3_IOM_SPI_SCLK:
*pad = 42;
*funcsel = AM_HAL_PIN_42_M3SCK;
break;
case AP3_IOM_SPI_MOSI:
*pad = 38;
*funcsel = AM_HAL_PIN_38_M3MOSI;
break;
case AP3_IOM_SPI_MISO:
*pad = 43;
*funcsel = AM_HAL_PIN_43_M3MISO;
break;
default:
goto invalid_args;
break;
}
break;

case 4:
switch (type)
{
case AP3_IOM_I2C_SCL:
*pad = 39;
*funcsel = AM_HAL_PIN_39_M4SCL;
break;
case AP3_IOM_I2C_SDA:
*pad = 40;
*funcsel = AM_HAL_PIN_40_M4SDAWIR3;
break;
case AP3_IOM_SPI_SCLK:
*pad = 39;
*funcsel = AM_HAL_PIN_39_M4SCK;
break;
case AP3_IOM_SPI_MOSI:
*pad = 44;
*funcsel = AM_HAL_PIN_44_M4MOSI;
break;
case AP3_IOM_SPI_MISO:
*pad = 40;
*funcsel = AM_HAL_PIN_40_M4MISO;
break;
default:
goto invalid_args;
break;
}
break;

case 5:
switch (type)
{
case AP3_IOM_I2C_SCL:
*pad = 48;
*funcsel = AM_HAL_PIN_48_M5SCL;
break;
case AP3_IOM_I2C_SDA:
*pad = 49;
*funcsel = AM_HAL_PIN_49_M5SDAWIR3;
break;
case AP3_IOM_SPI_SCLK:
*pad = 48;
*funcsel = AM_HAL_PIN_48_M5SCK;
break;
case AP3_IOM_SPI_MOSI:
*pad = 47;
*funcsel = AM_HAL_PIN_47_M5MOSI;
break;
case AP3_IOM_SPI_MISO:
*pad = 49;
*funcsel = AM_HAL_PIN_49_M5MISO;
break;
default:
goto invalid_args;
break;
}
break;

default:
goto invalid_args;
break;
}

return retval;
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