Change aarch64 vld1* instructions to not cause individual loads #1207
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I think at least the vst1* instruction should also use |
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@hkratz Thanks! Could you update the vst1 intrinsics as well like @SparrowLii suggested. |
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LGTM. Are you planning on implementing something else (the PR is still a draft). I don't think a test is needed for this. |
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I was thinking of a regression test for #1148, but it is not strictly necessary and afaics there is no easy way to do it. |
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Update stdarch submodule This is mainly to fix the critical issue of aarch64 store intrinsics overwriting additional memory, see rust-lang/stdarch#1220 Changes: * aarch64/armv7: additional vld1/vst1 intrinsics + perf fixes for existing ones * rust-lang/stdarch#1205 * rust-lang/stdarch#1207 * rust-lang/stdarch#1216 * armv7: Make FMA work with vfpv4 and optimize * rust-lang/stdarch#1219 * Non-visible changes to the testing framework * rust-lang/stdarch#1208 * rust-lang/stdarch#1211 * rust-lang/stdarch#1213 * rust-lang/stdarch#1215 * rust-lang/stdarch#1218
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vld1* instructions are required to always compile to a single load instruction (see ARM developer documentation). The current implementation causes individual loads to be emitted in LLVM-IR which are not always combined to a single load instruction during LLVM optimization passes. This change causes a single load to be emitted in all cases.
cc @SparrowLii
TODO:
Fixes #1148.