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Invalid instructions (UMAAL) are generated for the thumbv7m-none-eabi target #37227
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Relevant information: See the ARM Cortex-M instructions groups table under instructions sets. UMAAL is in the group of instructions that are not available for the Cortex-M3, which is the processor the thumbv7m target covers. Building core with a explicit |
Minimal IR that triggers the problem: |
I have submitted the fix for review: |
Fixed in llvm upstream, r285278 and r285280 |
How does llvm version gets updated? Do I need to backport this fix to llvm 3.9 somehow, so it could land in rust? |
@pftbest nice! To update LLVM there's two routes:
(1) is much easier than (2) typically, and we're fine with both! |
So, I've rebased |
@pftbest I think:
|
Ok I've pushed your branch to rust-lang/llvm (thanks for the rebase to 3.9.1!). As @japaric mentioned if you want to send a PR to rust-lang/rust updating the submodule I'll r+ that |
Thank you! I have submitted a #37465 |
LLVM: Update submodule to rust-llvm-2016-10-29 branch. Fixes #37227
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UMAAL is only available in the ARMv7E-M processors but if you compile
core
for thethumbv7m
(ARMv7-M) target,rustc
/LLVM generates them for thecore::num::flt2dec::strategy::grisu::format_shortest_opt
function.The text was updated successfully, but these errors were encountered: