@@ -32,6 +32,23 @@ define i1 @test_and1_logical(i32 %x, i32 %n) {
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ret i1 %c
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}
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+ define i1 @test_and1_sext (i32 %x , i64 %n ) {
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+ ; CHECK-LABEL: @test_and1_sext(
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+ ; CHECK-NEXT: [[N_NOT_NEGATIVE:%.*]] = icmp sgt i64 [[NN:%.*]], -1
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+ ; CHECK-NEXT: call void @llvm.assume(i1 [[N_NOT_NEGATIVE]])
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+ ; CHECK-NEXT: [[X_SEXT:%.*]] = sext i32 [[X:%.*]] to i64
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+ ; CHECK-NEXT: [[C:%.*]] = icmp ugt i64 [[NN]], [[X_SEXT]]
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+ ; CHECK-NEXT: ret i1 [[C]]
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+ ;
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+ %n_not_negative = icmp sge i64 %n , 0
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+ call void @llvm.assume (i1 %n_not_negative )
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+ %x_sext = sext i32 %x to i64
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+ %a = icmp sge i32 %x , 0
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+ %b = icmp slt i64 %x_sext , %n
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+ %c = and i1 %a , %b
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+ ret i1 %c
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+ }
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+
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define i1 @test_and2 (i32 %x , i32 %n ) {
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; CHECK-LABEL: @test_and2(
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; CHECK-NEXT: [[NN:%.*]] = and i32 [[N:%.*]], 2147483647
@@ -60,6 +77,23 @@ define i1 @test_and2_logical(i32 %x, i32 %n) {
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ret i1 %c
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}
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+ define i1 @test_and2_sext (i32 %x , i64 %n ) {
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+ ; CHECK-LABEL: @test_and2_sext(
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+ ; CHECK-NEXT: [[N_NOT_NEGATIVE:%.*]] = icmp sgt i64 [[NN:%.*]], -1
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+ ; CHECK-NEXT: call void @llvm.assume(i1 [[N_NOT_NEGATIVE]])
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+ ; CHECK-NEXT: [[X_SEXT:%.*]] = sext i32 [[X:%.*]] to i64
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+ ; CHECK-NEXT: [[C:%.*]] = icmp uge i64 [[NN]], [[X_SEXT]]
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+ ; CHECK-NEXT: ret i1 [[C]]
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+ ;
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+ %n_not_negative = icmp sge i64 %n , 0
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+ call void @llvm.assume (i1 %n_not_negative )
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+ %x_sext = sext i32 %x to i64
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+ %a = icmp sgt i32 %x , -1
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+ %b = icmp sle i64 %x_sext , %n
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+ %c = and i1 %a , %b
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+ ret i1 %c
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+ }
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+
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define i1 @test_and3 (i32 %x , i32 %n ) {
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; CHECK-LABEL: @test_and3(
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; CHECK-NEXT: [[NN:%.*]] = and i32 [[N:%.*]], 2147483647
@@ -86,6 +120,23 @@ define i1 @test_and3_logical(i32 %x, i32 %n) {
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ret i1 %c
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}
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+ define i1 @test_and3_sext (i32 %x , i64 %n ) {
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+ ; CHECK-LABEL: @test_and3_sext(
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+ ; CHECK-NEXT: [[N_NOT_NEGATIVE:%.*]] = icmp sgt i64 [[NN:%.*]], -1
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+ ; CHECK-NEXT: call void @llvm.assume(i1 [[N_NOT_NEGATIVE]])
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+ ; CHECK-NEXT: [[X_SEXT:%.*]] = sext i32 [[X:%.*]] to i64
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+ ; CHECK-NEXT: [[C:%.*]] = icmp ugt i64 [[NN]], [[X_SEXT]]
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+ ; CHECK-NEXT: ret i1 [[C]]
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+ ;
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+ %n_not_negative = icmp sge i64 %n , 0
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+ call void @llvm.assume (i1 %n_not_negative )
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+ %x_sext = sext i32 %x to i64
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+ %a = icmp sgt i64 %n , %x_sext
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+ %b = icmp sge i32 %x , 0
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+ %c = and i1 %a , %b
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+ ret i1 %c
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+ }
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+
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define i1 @test_and4 (i32 %x , i32 %n ) {
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; CHECK-LABEL: @test_and4(
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; CHECK-NEXT: [[NN:%.*]] = and i32 [[N:%.*]], 2147483647
@@ -112,6 +163,23 @@ define i1 @test_and4_logical(i32 %x, i32 %n) {
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ret i1 %c
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}
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+ define i1 @test_and4_sext (i32 %x , i64 %n ) {
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+ ; CHECK-LABEL: @test_and4_sext(
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+ ; CHECK-NEXT: [[N_NOT_NEGATIVE:%.*]] = icmp sgt i64 [[NN:%.*]], -1
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+ ; CHECK-NEXT: call void @llvm.assume(i1 [[N_NOT_NEGATIVE]])
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+ ; CHECK-NEXT: [[X_SEXT:%.*]] = sext i32 [[X:%.*]] to i64
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+ ; CHECK-NEXT: [[C:%.*]] = icmp uge i64 [[NN]], [[X_SEXT]]
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+ ; CHECK-NEXT: ret i1 [[C]]
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+ ;
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+ %n_not_negative = icmp sge i64 %n , 0
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+ call void @llvm.assume (i1 %n_not_negative )
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+ %x_sext = sext i32 %x to i64
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+ %a = icmp sge i64 %n , %x_sext
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+ %b = icmp sge i32 %x , 0
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+ %c = and i1 %a , %b
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+ ret i1 %c
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+ }
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+
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define i1 @test_or1 (i32 %x , i32 %n ) {
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; CHECK-LABEL: @test_or1(
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; CHECK-NEXT: [[NN:%.*]] = and i32 [[N:%.*]], 2147483647
@@ -140,6 +208,23 @@ define i1 @test_or1_logical(i32 %x, i32 %n) {
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ret i1 %c
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}
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+ define i1 @test_or1_sext (i32 %x , i64 %n ) {
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+ ; CHECK-LABEL: @test_or1_sext(
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+ ; CHECK-NEXT: [[N_NOT_NEGATIVE:%.*]] = icmp sgt i64 [[NN:%.*]], -1
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+ ; CHECK-NEXT: call void @llvm.assume(i1 [[N_NOT_NEGATIVE]])
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+ ; CHECK-NEXT: [[X_SEXT:%.*]] = sext i32 [[X:%.*]] to i64
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+ ; CHECK-NEXT: [[C:%.*]] = icmp ule i64 [[NN]], [[X_SEXT]]
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+ ; CHECK-NEXT: ret i1 [[C]]
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+ ;
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+ %n_not_negative = icmp sge i64 %n , 0
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+ call void @llvm.assume (i1 %n_not_negative )
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+ %x_sext = sext i32 %x to i64
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+ %a = icmp slt i32 %x , 0
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+ %b = icmp sge i64 %x_sext , %n
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+ %c = or i1 %a , %b
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+ ret i1 %c
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+ }
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+
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define i1 @test_or2 (i32 %x , i32 %n ) {
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; CHECK-LABEL: @test_or2(
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; CHECK-NEXT: [[NN:%.*]] = and i32 [[N:%.*]], 2147483647
@@ -168,6 +253,23 @@ define i1 @test_or2_logical(i32 %x, i32 %n) {
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ret i1 %c
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}
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+ define i1 @test_or2_sext (i32 %x , i64 %n ) {
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+ ; CHECK-LABEL: @test_or2_sext(
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+ ; CHECK-NEXT: [[N_NOT_NEGATIVE:%.*]] = icmp sgt i64 [[NN:%.*]], -1
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+ ; CHECK-NEXT: call void @llvm.assume(i1 [[N_NOT_NEGATIVE]])
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+ ; CHECK-NEXT: [[X_SEXT:%.*]] = sext i32 [[X:%.*]] to i64
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+ ; CHECK-NEXT: [[C:%.*]] = icmp ult i64 [[NN]], [[X_SEXT]]
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+ ; CHECK-NEXT: ret i1 [[C]]
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+ ;
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+ %n_not_negative = icmp sge i64 %n , 0
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+ call void @llvm.assume (i1 %n_not_negative )
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+ %x_sext = sext i32 %x to i64
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+ %a = icmp sle i32 %x , -1
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+ %b = icmp sgt i64 %x_sext , %n
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+ %c = or i1 %a , %b
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+ ret i1 %c
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+ }
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+
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define i1 @test_or3 (i32 %x , i32 %n ) {
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; CHECK-LABEL: @test_or3(
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; CHECK-NEXT: [[NN:%.*]] = and i32 [[N:%.*]], 2147483647
@@ -194,6 +296,23 @@ define i1 @test_or3_logical(i32 %x, i32 %n) {
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ret i1 %c
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}
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+ define i1 @test_or3_sext (i32 %x , i64 %n ) {
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+ ; CHECK-LABEL: @test_or3_sext(
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+ ; CHECK-NEXT: [[N_NOT_NEGATIVE:%.*]] = icmp sgt i64 [[NN:%.*]], -1
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+ ; CHECK-NEXT: call void @llvm.assume(i1 [[N_NOT_NEGATIVE]])
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+ ; CHECK-NEXT: [[X_SEXT:%.*]] = sext i32 [[X:%.*]] to i64
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+ ; CHECK-NEXT: [[C:%.*]] = icmp ule i64 [[NN]], [[X_SEXT]]
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+ ; CHECK-NEXT: ret i1 [[C]]
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+ ;
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+ %n_not_negative = icmp sge i64 %n , 0
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+ call void @llvm.assume (i1 %n_not_negative )
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+ %x_sext = sext i32 %x to i64
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+ %a = icmp sle i64 %n , %x_sext
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+ %b = icmp slt i32 %x , 0
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+ %c = or i1 %a , %b
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+ ret i1 %c
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+ }
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+
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define i1 @test_or4 (i32 %x , i32 %n ) {
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; CHECK-LABEL: @test_or4(
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; CHECK-NEXT: [[NN:%.*]] = and i32 [[N:%.*]], 2147483647
@@ -220,6 +339,23 @@ define i1 @test_or4_logical(i32 %x, i32 %n) {
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ret i1 %c
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}
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+ define i1 @test_or4_sext (i32 %x , i64 %n ) {
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+ ; CHECK-LABEL: @test_or4_sext(
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+ ; CHECK-NEXT: [[N_NOT_NEGATIVE:%.*]] = icmp sgt i64 [[NN:%.*]], -1
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+ ; CHECK-NEXT: call void @llvm.assume(i1 [[N_NOT_NEGATIVE]])
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+ ; CHECK-NEXT: [[X_SEXT:%.*]] = sext i32 [[X:%.*]] to i64
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+ ; CHECK-NEXT: [[C:%.*]] = icmp ult i64 [[NN]], [[X_SEXT]]
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+ ; CHECK-NEXT: ret i1 [[C]]
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+ ;
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+ %n_not_negative = icmp sge i64 %n , 0
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+ call void @llvm.assume (i1 %n_not_negative )
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+ %x_sext = sext i32 %x to i64
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+ %a = icmp slt i64 %n , %x_sext
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+ %b = icmp slt i32 %x , 0
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+ %c = or i1 %a , %b
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+ ret i1 %c
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+ }
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+
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; Negative tests
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define i1 @negative1 (i32 %x , i32 %n ) {
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