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[RISCV] Add more tests for vcpop and vfirst with VL=0
Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D120300
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llvm/test/CodeGen/RISCV/rvv/vcpop.ll

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Original file line numberDiff line numberDiff line change
@@ -21,6 +21,20 @@ entry:
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ret iXLen %a
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}
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define iXLen @intrinsic_vcpop_m_nxv1i1_zero(<vscale x 1 x i1> %0) nounwind {
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; CHECK-LABEL: intrinsic_vcpop_m_nxv1i1_zero:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vsetivli zero, 0, e8, mf8, ta, mu
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; CHECK-NEXT: vcpop.m a0, v0
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; CHECK-NEXT: ret
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entry:
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%a = call iXLen @llvm.riscv.vcpop.iXLen.nxv1i1(
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<vscale x 1 x i1> %0,
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iXLen 0)
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ret iXLen %a
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}
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declare iXLen @llvm.riscv.vcpop.mask.iXLen.nxv1i1(
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<vscale x 1 x i1>,
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<vscale x 1 x i1>,
@@ -43,6 +57,23 @@ entry:
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ret iXLen %a
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}
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define iXLen @intrinsic_vcpop_mask_m_nxv1i1_zero(<vscale x 1 x i1> %0, <vscale x 1 x i1> %1) nounwind {
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; CHECK-LABEL: intrinsic_vcpop_mask_m_nxv1i1_zero:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vmv1r.v v9, v0
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; CHECK-NEXT: vsetivli zero, 0, e8, mf8, ta, mu
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; CHECK-NEXT: vmv1r.v v0, v8
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; CHECK-NEXT: vcpop.m a0, v9, v0.t
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; CHECK-NEXT: ret
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entry:
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%a = call iXLen @llvm.riscv.vcpop.mask.iXLen.nxv1i1(
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<vscale x 1 x i1> %0,
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<vscale x 1 x i1> %1,
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iXLen 0)
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ret iXLen %a
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}
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declare iXLen @llvm.riscv.vcpop.iXLen.nxv2i1(
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<vscale x 2 x i1>,
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iXLen);

llvm/test/CodeGen/RISCV/rvv/vfirst.ll

+31
Original file line numberDiff line numberDiff line change
@@ -21,6 +21,20 @@ entry:
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ret iXLen %a
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}
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define iXLen @intrinsic_vfirst_m_nxv1i1_zero(<vscale x 1 x i1> %0) nounwind {
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; CHECK-LABEL: intrinsic_vfirst_m_nxv1i1_zero:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vsetivli zero, 0, e8, mf8, ta, mu
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; CHECK-NEXT: vfirst.m a0, v0
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; CHECK-NEXT: ret
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entry:
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%a = call iXLen @llvm.riscv.vfirst.iXLen.nxv1i1(
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<vscale x 1 x i1> %0,
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iXLen 0)
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ret iXLen %a
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}
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declare iXLen @llvm.riscv.vfirst.mask.iXLen.nxv1i1(
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<vscale x 1 x i1>,
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<vscale x 1 x i1>,
@@ -43,6 +57,23 @@ entry:
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ret iXLen %a
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}
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define iXLen @intrinsic_vfirst_mask_m_nxv1i1_zero(<vscale x 1 x i1> %0, <vscale x 1 x i1> %1) nounwind {
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; CHECK-LABEL: intrinsic_vfirst_mask_m_nxv1i1_zero:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vmv1r.v v9, v0
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; CHECK-NEXT: vsetivli zero, 0, e8, mf8, ta, mu
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; CHECK-NEXT: vmv1r.v v0, v8
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; CHECK-NEXT: vfirst.m a0, v9, v0.t
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; CHECK-NEXT: ret
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entry:
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%a = call iXLen @llvm.riscv.vfirst.mask.iXLen.nxv1i1(
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<vscale x 1 x i1> %0,
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<vscale x 1 x i1> %1,
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iXLen 0)
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ret iXLen %a
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}
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declare iXLen @llvm.riscv.vfirst.iXLen.nxv2i1(
4778
<vscale x 2 x i1>,
4879
iXLen);

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