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1 parent 8686048 commit 26621a7Copy full SHA for 26621a7
configs/defconfig.esp32s3
@@ -14,6 +14,7 @@ CONFIG_ESP32S3_ULP_COPROC_ENABLED=y
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# ULP Setting for IDF 5.x
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CONFIG_ULP_COPROC_ENABLED=y
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# end of ULP COPROC_ENABLE
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+# Is it FSM or RISCV exclusively?
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CONFIG_ULP_COPROC_TYPE_FSM=y
-CONFIG_ULP_COPROC_TYPE_RISCV=y
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+# CONFIG_ULP_COPROC_TYPE_RISCV=y
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CONFIG_ULP_COPROC_RESERVE_MEM=4096
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