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ESP32-C6 Fixes Settings for RMT and UART source clock #8340

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Merged
merged 2 commits into from
Jun 29, 2023
Merged

ESP32-C6 Fixes Settings for RMT and UART source clock #8340

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c9e1366
Fixes RMT Source Clock setting
SuGlider Jun 21, 2023
ba8317a
Fixes UART Source Clock setting
SuGlider Jun 21, 2023
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10 changes: 2 additions & 8 deletions cores/esp32/esp32-hal-rmt.c
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Original file line number Diff line number Diff line change
Expand Up @@ -478,11 +478,8 @@ bool rmtInit(int pin, rmt_ch_dir_t channel_direction, rmt_reserve_memsize_t mem_
// TX Channel
rmt_tx_channel_config_t tx_cfg;
tx_cfg.gpio_num = pin;
#if CONFIG_IDF_TARGET_ESP32C6
// CLK_APB for ESP32|S2|S3|C3 -- CLK_PLL_F80M for C6 -- CLK_XTAL for H2
tx_cfg.clk_src = RMT_CLK_SRC_DEFAULT;
#else
tx_cfg.clk_src = RMT_CLK_SRC_APB;
#endif
tx_cfg.resolution_hz = frequency_Hz;
tx_cfg.mem_block_symbols = SOC_RMT_MEM_WORDS_PER_CHANNEL * mem_size;
tx_cfg.trans_queue_depth = 10; // maximum allowed
Expand All @@ -507,11 +504,8 @@ bool rmtInit(int pin, rmt_ch_dir_t channel_direction, rmt_reserve_memsize_t mem_
// RX Channel
rmt_rx_channel_config_t rx_cfg;
rx_cfg.gpio_num = pin;
#if CONFIG_IDF_TARGET_ESP32C6
// CLK_APB for ESP32|S2|S3|C3 -- CLK_PLL_F80M for C6 -- CLK_XTAL for H2
rx_cfg.clk_src = RMT_CLK_SRC_DEFAULT;
#else
rx_cfg.clk_src = RMT_CLK_SRC_APB;
#endif
rx_cfg.resolution_hz = frequency_Hz;
rx_cfg.mem_block_symbols = SOC_RMT_MEM_WORDS_PER_CHANNEL * mem_size;
rx_cfg.flags.invert_in = 0;
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5 changes: 1 addition & 4 deletions cores/esp32/esp32-hal-uart.c
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Original file line number Diff line number Diff line change
Expand Up @@ -192,11 +192,8 @@ uart_t* uartBegin(uint8_t uart_nr, uint32_t baudrate, uint32_t config, int8_t rx
uart_config.flow_ctrl = UART_HW_FLOWCTRL_DISABLE;
uart_config.rx_flow_ctrl_thresh = rxfifo_full_thrhd;
uart_config.baud_rate = baudrate;
#if CONFIG_IDF_TARGET_ESP32C6
// CLK_APB for ESP32|S2|S3|C3 -- CLK_PLL_F40M for C2 -- CLK_PLL_F48M for H2 -- CLK_PLL_F80M for C6
uart_config.source_clk = UART_SCLK_DEFAULT;
#else
uart_config.source_clk = UART_SCLK_APB;
#endif
ESP_ERROR_CHECK(uart_driver_install(uart_nr, rx_buffer_size, tx_buffer_size, 20, &(uart->uart_event_queue), 0));
ESP_ERROR_CHECK(uart_param_config(uart_nr, &uart_config));
ESP_ERROR_CHECK(uart_set_pin(uart_nr, txPin, rxPin, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE));
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