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Fixes Arduino Wire::begin overload #7000

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Merged
merged 5 commits into from
Jul 26, 2022
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SuGlider
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@SuGlider SuGlider commented Jul 16, 2022

Description of Change

There some issues with Wire::begin() overload.
This PR fixes most issues and makes Wire API fully compatible with Arduino Mainstream.

Tests scenarios

#include <Wire.h>

#if CONFIG_IDF_TARGET_ESP32
  #define SDA_1 14
  #define SCL_1 15
#else
  #define SDA_1 10
  #define SCL_1 11
#endif
#define SLV_ADDR 0x21

void setup() {
  Serial.begin(115200);
  Serial.println("\nFor better results, turn Core Debug Level to Verbose.\n");

  // I2C MASTER Test Cases
  Serial.println("\nUC 1.1 - Master - default SDA/SCL pins, default 100KHz bus");
  Wire.end(); Wire.begin();

  Serial.println("\nUC 1.2 - Master - default SDA/SCL pins, default 100KHz bus");
  Wire.end(); Wire.begin(-1, -1);
  
  Serial.println("\nUC 1.3 - Master - default SDA/SCL pins, 1KHz bus");
  Wire.end(); Wire.begin(-1, -1, 1000);
  
  Serial.println("\nUC 1.4 - Master - default SDA, SCL pin 2, 2KHz bus");
  Wire.end(); Wire.begin(-1, 2, 2000);

  Serial.println("\nUC 1.5 - Master - default SDA/SCL pins, 400KHz bus");
  Wire.end(); Wire.begin(SDA, SCL, 400000);

#if CONFIG_IDF_TARGET_ESP32
  // Pins 6-11 are on ESP32 connected to SPI-FLASH and cannot be used for I2C, otherwise, it would lead to WDT
  Serial.println("\nUC 1.6 - Master default SDA pin 12, SCL pin 13, 800KHz bus");
  Wire.end(); Wire.begin(12, 13, 800000);

  Serial.println("\nUC 1.7 - Master - SDA pin 12, SCL pin 13, default 100KHz bus");
  Wire.end(); Wire.begin(12,13);

  Serial.println("\nUC 1.8 - Master - SDA pin 14, SCL pin 15, 200KHz bus");
  Wire.end(); Wire.begin(SDA_1, SCL_1, 200000);
#else
  Serial.println("\nUC 1.6 - Master default SDA pin 8, SCL pin 9, 800KHz bus");
  Wire.end(); Wire.begin(8, 9, 800000);
  
  Serial.println("\nUC 1.7 - Master - SDA pin 8, SCL pin 9, default 100KHz bus");
  Wire.end(); Wire.begin(8,9);
  
  Serial.println("\nUC 1.8 - Master - SDA pin 10, SCL pin 11, 200KHz bus");
  Wire.end(); Wire.begin(SDA_1, SCL_1, 200000);
#endif
  Serial.println("\nUC 1.9 - Master - default SDA/SCL pins, default 100KHz bus");
  Wire.end(); Wire.begin(SDA, SCL);
  
  Serial.println("\nUC 1.10 - Master - default SDA/SCL pins, 4KHz bus");
  Wire.end(); Wire.begin(-1, -1, 4000);
  
  Serial.println("\nUC 1.11 - Master - default SDA/SCL pins, default 100KHz bus");
  Wire.end(); Wire.begin((int) SDA , (int) SCL);

  // I2C SLAVE Test Cases
  Serial.println("\nUC 2.1 - Slave - ADDR 0x28 - default SDA/SCL pins, default 100KHz bus");
  Wire.end(); Wire.begin(0x28);
  
  Serial.println("\nUC 2.2 - Slave - ADDR 0x21 - default SDA/SCL pins, default 100KHz bus");
  Wire.end(); Wire.begin(SLV_ADDR);
  
  Serial.println("\nUC 2.3 - Slave - ADDR 0x21 - default SDA/SCL pins, 4KHz bus");
  Wire.end(); Wire.begin(SLV_ADDR, -1, -1, 4000);
  
  Serial.println("\nUC 2.4 - Slave - ADDR 0x38 - SDA 10, SCL 11, default 100KHz bus");
  Wire.end(); Wire.begin(0x38, SDA_1, SCL_1, 0);
  
  Serial.println("\nUC 2.5 - Slave - ADDR 0x38 - default SDA/SCL pins, 4KHz bus");
  Wire.end(); Wire.begin(0x38, -1, SCL, 4000);

}

void loop() {
}

Debug Output on C3

ESP-ROM:esp32c3-api1-20210207
Build:Feb  7 2021
rst:0x1 (POWERON),boot:0xc (SPI_FAST_FLASH_BOOT)
SPIWP:0xee
mode:DIO, clock div:1
load:0x3fcd6100,len:0x438
load:0x403ce000,len:0x918
load:0x403d0000,len:0x24e4
SHA-256 comparison failed:
Calculated: 080c5cb68a075ced55f248b97bca965e3e5bd5da80a64e34e6a1638f89d6f64e
Expected: ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
Attempting to boot anyway...
entry 0x403ce000

For better results, turn Core Debug Level to Verbose.


UC 1.1 - Master - default SDA/SCL pins, default 100KHz bus
[   102][I][esp32-hal-i2c.c:75] i2cInit(): Initialising I2C Master: sda=8 scl=9 freq=100000

UC 1.2 - Master - default SDA/SCL pins, default 100KHz bus
[   119][I][esp32-hal-i2c.c:75] i2cInit(): Initialising I2C Master: sda=8 scl=9 freq=100000

UC 1.3 - Master - default SDA/SCL pins, 1KHz bus
[   132][I][esp32-hal-i2c.c:75] i2cInit(): Initialising I2C Master: sda=8 scl=9 freq=1000

UC 1.4 - Master - default SDA, SCL pin 2, 2KHz bus
[   145][I][esp32-hal-i2c.c:75] i2cInit(): Initialising I2C Master: sda=8 scl=2 freq=2000

UC 1.5 - Master - default SDA/SCL pins, 400KHz bus
[   157][I][esp32-hal-i2c.c:75] i2cInit(): Initialising I2C Master: sda=8 scl=9 freq=400000

UC 1.6 - Master default SDA pin 8, SCL pin 9, 800KHz bus
[   170][I][esp32-hal-i2c.c:75] i2cInit(): Initialising I2C Master: sda=8 scl=9 freq=800000

UC 1.7 - Master - SDA pin 8, SCL pin 9, default 100KHz bus
[   183][I][esp32-hal-i2c.c:75] i2cInit(): Initialising I2C Master: sda=8 scl=9 freq=100000

UC 1.8 - Master - SDA pin 10, SCL pin 11, 200KHz bus
[   196][I][esp32-hal-i2c.c:75] i2cInit(): Initialising I2C Master: sda=10 scl=11 freq=200000

UC 1.9 - Master - default SDA/SCL pins, default 100KHz bus
[   209][I][esp32-hal-i2c.c:75] i2cInit(): Initialising I2C Master: sda=8 scl=9 freq=100000

UC 1.10 - Master - default SDA/SCL pins, 4KHz bus
[   223][I][esp32-hal-i2c.c:75] i2cInit(): Initialising I2C Master: sda=8 scl=9 freq=4000

UC 1.11 - Master - default SDA/SCL pins, default 100KHz bus
[   235][I][esp32-hal-i2c.c:75] i2cInit(): Initialising I2C Master: sda=8 scl=9 freq=100000

UC 2.1 - Slave - ADDR 0x28 - default SDA/SCL pins, default 100KHz bus
[   249][I][esp32-hal-i2c-slave.c:234] i2cSlaveInit(): Initialising I2C Slave: sda=8 scl=9 freq=100000, addr=0x28
[   255][D][esp32-hal-i2c-slave.c:486] i2c_slave_set_frequency(): Fifo thresholds: rx_fifo_full = 28, tx_fifo_empty = 4

UC 2.2 - Slave - ADDR 0x21 - default SDA/SCL pins, default 100KHz bus
[   276][I][esp32-hal-i2c-slave.c:234] i2cSlaveInit(): Initialising I2C Slave: sda=8 scl=9 freq=100000, addr=0x21
[   281][D][esp32-hal-i2c-slave.c:486] i2c_slave_set_frequency(): Fifo thresholds: rx_fifo_full = 28, tx_fifo_empty = 4

UC 2.3 - Slave - ADDR 0x21 - default SDA/SCL pins, 4KHz bus
[   302][I][esp32-hal-i2c-slave.c:234] i2cSlaveInit(): Initialising I2C Slave: sda=8 scl=9 freq=4000, addr=0x21
[   307][D][esp32-hal-i2c-slave.c:486] i2c_slave_set_frequency(): Fifo thresholds: rx_fifo_full = 30, tx_fifo_empty = 2

UC 2.4 - Slave - ADDR 0x38 - SDA 10, SCL 11, default 100KHz bus
[   328][I][esp32-hal-i2c-slave.c:234] i2cSlaveInit(): Initialising I2C Slave: sda=10 scl=11 freq=100000, addr=0x38
[   333][D][esp32-hal-i2c-slave.c:486] i2c_slave_set_frequency(): Fifo thresholds: rx_fifo_full = 28, tx_fifo_empty = 4

UC 2.5 - Slave - ADDR 0x38 - default SDA/SCL pins, 4KHz bus
[   354][I][esp32-hal-i2c-slave.c:234] i2cSlaveInit(): Initialising I2C Slave: sda=10 scl=9 freq=4000, addr=0x38
[   359][D][esp32-hal-i2c-slave.c:486] i2c_slave_set_frequency(): Fifo thresholds: rx_fifo_full = 30, tx_fifo_empty = 2

Related links

Fixes #6616

@SuGlider SuGlider added this to the 2.0.5 milestone Jul 16, 2022
@SuGlider SuGlider self-assigned this Jul 16, 2022
@P-R-O-C-H-Y
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P-R-O-C-H-Y commented Jul 18, 2022

@SuGlider Tested on C3 and gets same result, but when tested on ESP32 I got only this output and then it gets reset by TG1WDT_SYS_RESET

For better results, turn Core Debug Level to Verbose.

UC 1.1 - Master - default SDA/SCL pins, default 100KHz bus
[    11][I][esp32-hal-i2c.c:75] i2cInit(): Initialising I2C Master: sda=21 scl=22 freq=100000

UC 1.2 - Master - default SDA/SCL pins, default 100KHz bus
[    29][I][esp32-hal-i2c.c:75] i2cInit(): Initialising I2C Master: sda=21 scl=22 freq=100000

UC 1.3 - Master - default SDA/SCL pins, 1KHz bus
[    42][I][esp32-hal-i2c.c:75] i2cInit(): Initialising I2C Master: sda=21 scl=22 freq=1000

UC 1.4 - Master - default SDA, SCL pin 2, 2KHz bus
[    55][I][esp32-hal-i2c.c:75] i2cInit(): Initialising I2C Master: sda=21 scl=2 freq=2000

UC 1.5 - Master - default SDA/SCL pins, 400KHz bus
[    67][I][esp32-hal-i2c.c:75] i2cInit(): Initialising I2C Master: sda=21 scl=22 freq=400000

UC 1.6 - Master default SDA pin 8, SCL pin 9, 800KHz bus
[    80][I][esp32-hal-i2c.c:75] i2cInit(): Initialising I2C Master: sda=8 scl=9 freq=800000

rst:0x8 (TG1WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)

====
EDIT:

Working as expected too on ESP32, just have to change the pins to test your sketch.

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@P-R-O-C-H-Y P-R-O-C-H-Y left a comment

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LGMT :) Everything looks great

@PilnyTomas
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Sorry for the delay.
Tested on ESP32, C3, and S2.
C3 and S2 seem to be ok, but ESP32 is failing on 1.6 - after i2cInit() is triggered Watch Dog.

Attaching logs:
C3.log
S2.log

@P-R-O-C-H-Y
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Sorry for the delay.
Tested on ESP32, C3, and S2.
C3 and S2 seem to be ok, but ESP32 is failing on 1.6 - after i2cInit() is triggered Watch Dog.

Attaching logs:
C3.log
S2.log

Have you changed pins for ESP32?

@PilnyTomas
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Nope :D what is the problem with them?

@SuGlider
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SuGlider commented Jul 21, 2022

Nope :D what is the problem with them?

on ESP32 pins 8 and 9 are used for Flash.
WDT is expected. In that case, it is necessary to change the pins in the sketch.

@PilnyTomas
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I have updated your test with #if CONFIG_IDF_TARGET_ESP32 and changed the pins for ESP32, now it should pass all chips without manual change.

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OK

@VojtechBartoska VojtechBartoska added the Status: Pending Merge Pull Request is ready to be merged label Jul 25, 2022
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Confusing overload of Wire::begin
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