IDF release/v4.4

tools/platformio-build-esp32.py

@@ -100,6 +100,7 @@
         "-u", "pthread_include_pthread_impl",
         "-u", "pthread_include_pthread_cond_impl",
         "-u", "pthread_include_pthread_local_storage_impl",
+        "-u", "pthread_include_pthread_rwlock_impl",
         "-u", "ld_include_highint_hdl",
         "-u", "start_app",
         "-u", "start_app_other_cores",
@@ -303,8 +304,9 @@
         "UNITY_INCLUDE_CONFIG_H",
         "WITH_POSIX",
         "_GNU_SOURCE",
-        ("IDF_VER", '\\"v4.4-dev-3569-g6a7d83af19\\"'),
+        ("IDF_VER", '\\"v4.4-dev-3703-gddc44956bf\\"'),
         "ESP_PLATFORM",
+        "_POSIX_READER_WRITER_LOCKS",
         "ARDUINO_ARCH_ESP32",
         "ESP32",
         ("F_CPU", "$BOARD_F_CPU"),

tools/platformio-build-esp32c3.py

@@ -127,6 +127,7 @@
         "-u", "pthread_include_pthread_impl",
         "-u", "pthread_include_pthread_cond_impl",
         "-u", "pthread_include_pthread_local_storage_impl",
+        "-u", "pthread_include_pthread_rwlock_impl",
         "-u", "start_app",
         "-u", "__ubsan_include",
         "-u", "__assert_func",
@@ -293,8 +294,9 @@
         "UNITY_INCLUDE_CONFIG_H",
         "WITH_POSIX",
         "_GNU_SOURCE",
-        ("IDF_VER", '\\"v4.4-dev-3569-g6a7d83af19\\"'),
+        ("IDF_VER", '\\"v4.4-dev-3703-gddc44956bf\\"'),
         "ESP_PLATFORM",
+        "_POSIX_READER_WRITER_LOCKS",
         "ARDUINO_ARCH_ESP32",
         "ESP32",
         ("F_CPU", "$BOARD_F_CPU"),

tools/platformio-build-esp32s2.py

@@ -95,6 +95,7 @@
         "-u", "pthread_include_pthread_impl",
         "-u", "pthread_include_pthread_cond_impl",
         "-u", "pthread_include_pthread_local_storage_impl",
+        "-u", "pthread_include_pthread_rwlock_impl",
         "-u", "ld_include_highint_hdl",
         "-u", "start_app",
         "-u", "__ubsan_include",
@@ -289,8 +290,9 @@
         "UNITY_INCLUDE_CONFIG_H",
         "WITH_POSIX",
         "_GNU_SOURCE",
-        ("IDF_VER", '\\"v4.4-dev-3569-g6a7d83af19\\"'),
+        ("IDF_VER", '\\"v4.4-dev-3703-gddc44956bf\\"'),
         "ESP_PLATFORM",
+        "_POSIX_READER_WRITER_LOCKS",
         "ARDUINO_ARCH_ESP32",
         "ESP32",
         ("F_CPU", "$BOARD_F_CPU"),

tools/sdk/esp32/include/config/sdkconfig.h

@@ -346,6 +346,7 @@
 #define CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE 0
 #define CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER 1
 #define CONFIG_FREERTOS_DEBUG_OCDAWARE 1
+#define CONFIG_FREERTOS_FPU_IN_ISR 1
 #define CONFIG_FREERTOS_ENABLE_TASK_SNAPSHOT 1
 #define CONFIG_HAL_ASSERTION_EQUALS_SYSTEM 1
 #define CONFIG_HAL_DEFAULT_ASSERTION_LEVEL 2
@@ -370,6 +371,7 @@
 #define CONFIG_LWIP_ESP_GRATUITOUS_ARP 1
 #define CONFIG_LWIP_GARP_TMR_INTERVAL 60
 #define CONFIG_LWIP_TCPIP_RECVMBOX_SIZE 32
+#define CONFIG_LWIP_DHCP_DISABLE_VENDOR_CLASS_ID 1
 #define CONFIG_LWIP_DHCP_RESTORE_LAST_IP 1
 #define CONFIG_LWIP_DHCP_OPTIONS_LEN 128
 #define CONFIG_LWIP_DHCPS 1
@@ -636,6 +638,7 @@
 #define CONFIG_OPTIMIZATION_LEVEL_RELEASE CONFIG_COMPILER_OPTIMIZATION_SIZE
 #define CONFIG_POST_EVENTS_FROM_IRAM_ISR CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR
 #define CONFIG_POST_EVENTS_FROM_ISR CONFIG_ESP_EVENT_POST_FROM_ISR
+#define CONFIG_REDUCE_PHY_TX_POWER CONFIG_ESP_PHY_REDUCE_TX_POWER
 #define CONFIG_SCAN_DUPLICATE_BY_DEVICE_ADDR CONFIG_BTDM_SCAN_DUPL_TYPE_DEVICE
 #define CONFIG_SEMIHOSTFS_HOST_PATH_MAX_LEN CONFIG_VFS_SEMIHOSTFS_HOST_PATH_MAX_LEN
 #define CONFIG_SEMIHOSTFS_MAX_MOUNT_POINTS CONFIG_VFS_SEMIHOSTFS_MAX_MOUNT_POINTS
@@ -673,5 +676,5 @@
 #define CONFIG_ULP_COPROC_RESERVE_MEM CONFIG_ESP32_ULP_COPROC_RESERVE_MEM
 #define CONFIG_WARN_WRITE_STRINGS CONFIG_COMPILER_WARN_WRITE_STRINGS
 #define CONFIG_WIFI_LWIP_ALLOCATION_FROM_SPIRAM_FIRST CONFIG_SPIRAM_TRY_ALLOCATE_WIFI_LWIP
-#define CONFIG_ARDUINO_IDF_COMMIT "6a7d83af19"
+#define CONFIG_ARDUINO_IDF_COMMIT "ddc44956bf"
 #define CONFIG_ARDUINO_IDF_BRANCH "release/v4.4"

tools/sdk/esp32/include/driver/include/driver/mcpwm.h

@@ -174,7 +174,6 @@ typedef enum {
 /**
  * @brief Interrupt masks for MCPWM capture
  */
-__attribute__ ((deprecated("please use callback function to avoid directly accessing registers")))
 typedef enum {
     MCPWM_LL_INTR_CAP0 = BIT(27), ///< Capture 0 happened
     MCPWM_LL_INTR_CAP1 = BIT(28), ///< Capture 1 happened
@@ -922,7 +921,6 @@ esp_err_t mcpwm_sync_invert_gpio_synchro(mcpwm_unit_t mcpwm_num, mcpwm_sync_sign
  *     - ESP_OK Success
  *     - ESP_ERR_INVALID_ARG Function pointer error.
  */
-__attribute__((deprecated("interrupt events are handled by driver, please use callback")))
 esp_err_t mcpwm_isr_register(mcpwm_unit_t mcpwm_num, void (*fn)(void *), void *arg, int intr_alloc_flags,
                              intr_handle_t *handle);
 

tools/sdk/esp32/include/efuse/include/esp_efuse.h

@@ -6,11 +6,9 @@
 
 #pragma once
 
-#ifdef __cplusplus
-extern "C" {
-#endif
-
+#include <stdbool.h>
 #include <stdint.h>
+
 #include "esp_err.h"
 #include "esp_log.h"
 #include "soc/soc_caps.h"
@@ -29,6 +27,10 @@ extern "C" {
 #include "esp32h2/rom/secure_boot.h"
 #endif
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #define ESP_ERR_EFUSE                              0x1600                     /*!< Base error code for efuse api. */
 #define ESP_OK_EFUSE_CNT                          (ESP_ERR_EFUSE + 0x01)      /*!< OK the required number of bits is set. */
 #define ESP_ERR_EFUSE_CNT_IS_FULL                 (ESP_ERR_EFUSE + 0x02)      /*!< Error field is full. */

tools/sdk/esp32/include/esp_netif/include/esp_netif_types.h

@@ -79,6 +79,8 @@ typedef enum{
     ESP_NETIF_REQUESTED_IP_ADDRESS          = 50,   /**< Request specific IP address */
     ESP_NETIF_IP_ADDRESS_LEASE_TIME         = 51,   /**< Request IP address lease time */
     ESP_NETIF_IP_REQUEST_RETRY_TIME         = 52,   /**< Request IP address retry counter */
+    ESP_NETIF_VENDOR_CLASS_IDENTIFIER       = 60,   /**< Vendor Class Identifier of a DHCP client */
+    ESP_NETIF_VENDOR_SPECIFIC_INFO          = 43,   /**< Vendor Specific Information of a DHCP server */
 } esp_netif_dhcp_option_id_t;
 
 /** IP event declarations */

tools/sdk/esp32/include/esp_phy/include/phy.h

@@ -68,6 +68,13 @@ void phy_close_rf(void);
 void phy_xpd_tsens(void);
 #endif
 
+#if CONFIG_IDF_TARGET_ESP32C3
+/**
+ * @brief Update internal state of PHY when wifi deinit powers off the wifi power domain.
+ */
+void phy_init_flag(void);
+#endif
+
 /**
  * @brief Store and load PHY digital registers.
  *

tools/sdk/esp32/include/esp_timer/include/esp_timer.h

@@ -1,16 +1,8 @@
-// Copyright 2017 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #pragma once
 
@@ -83,11 +75,28 @@ typedef struct {
     bool skip_unhandled_events;     //!< Skip unhandled events for periodic timers
 } esp_timer_create_args_t;
 
+
+/**
+ * @brief Minimal initialization of esp_timer
+ *
+ * @note This function is called from startup code. Applications do not need
+ * to call this function before using other esp_timer APIs.
+ *
+ * This function can be called very early in startup process, after this call
+ * only esp_timer_get_time function can be used.
+ *
+ * @return
+ *      - ESP_OK on success
+ */
+esp_err_t esp_timer_early_init(void);
+
 /**
  * @brief Initialize esp_timer library
  *
  * @note This function is called from startup code. Applications do not need
  * to call this function before using other esp_timer APIs.
+ * Before calling this function, esp_timer_early_init must be called by the
+ * startup code.
  *
  * @return
  *      - ESP_OK on success

tools/sdk/esp32/include/freertos/port/xtensa/include/freertos/portmacro.h

@@ -155,15 +155,20 @@ void vPortAssertIfInISR(void);
 BaseType_t xPortInterruptedFromISRContext(void);
 
 /**
- * @brief Disable interrupts in a nested manner
+ * @brief Disable interrupts in a nested manner (meant to be called from ISRs)
  *
- * - Cleaner solution allows nested interrupts disabling and restoring via local registers or stack.
- * - They can be called from interrupts too.
- * - WARNING Only applies to current CPU.
- * @note [refactor-todo] Define this as portSET_INTERRUPT_MASK_FROM_ISR() instead
- * @return unsigned Previous interrupt state
+ * @warning Only applies to current CPU.
+ * @return UBaseType_t Previous interrupt level
  */
-static inline unsigned __attribute__((always_inline)) portENTER_CRITICAL_NESTED(void);
+static inline UBaseType_t xPortSetInterruptMaskFromISR(void);
+
+/**
+ * @brief Reenable interrupts in a nested manner (meant to be called from ISRs)
+ *
+ * @warning Only applies to current CPU.
+ * @param prev_level Previous interrupt level
+ */
+static inline void vPortClearInterruptMaskFromISR(UBaseType_t prev_level);
 
 /* ---------------------- Spinlocks ------------------------
  * - Modifications made to critical sections to support SMP
@@ -416,8 +421,6 @@ static inline BaseType_t IRAM_ATTR xPortGetCoreID(void);
 
 // --------------------- Interrupts ------------------------
 
-#define portEXIT_CRITICAL_NESTED(state)     do { portbenchmarkINTERRUPT_RESTORE(state); XTOS_RESTORE_JUST_INTLEVEL(state); } while (0)
-
 /**
  * - Only applies to current core
  * - These cannot be nested. They should be used with a lot of care and cannot be called from interrupt level.
@@ -430,8 +433,8 @@ static inline BaseType_t IRAM_ATTR xPortGetCoreID(void);
 /**
  * ISR versions to enable/disable interrupts
  */
-#define portSET_INTERRUPT_MASK_FROM_ISR()            portENTER_CRITICAL_NESTED()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(state)     portEXIT_CRITICAL_NESTED(state)
+#define portSET_INTERRUPT_MASK_FROM_ISR()                   xPortSetInterruptMaskFromISR()
+#define portCLEAR_INTERRUPT_MASK_FROM_ISR(prev_level)       vPortClearInterruptMaskFromISR(prev_level)
 
 #define portASSERT_IF_IN_ISR() vPortAssertIfInISR()
 
@@ -530,11 +533,17 @@ static inline BaseType_t IRAM_ATTR xPortGetCoreID(void);
 
 // --------------------- Interrupts ------------------------
 
-static inline unsigned portENTER_CRITICAL_NESTED(void)
+static inline UBaseType_t xPortSetInterruptMaskFromISR(void)
 {
-    unsigned state = XTOS_SET_INTLEVEL(XCHAL_EXCM_LEVEL);
+    UBaseType_t prev_int_level = XTOS_SET_INTLEVEL(XCHAL_EXCM_LEVEL);
     portbenchmarkINTERRUPT_DISABLE();
-    return state;
+    return prev_int_level;
+}
+
+static inline void vPortClearInterruptMaskFromISR(UBaseType_t prev_level)
+{
+    portbenchmarkINTERRUPT_RESTORE(prev_level);
+    XTOS_RESTORE_JUST_INTLEVEL(prev_level);
 }
 
 // ---------------------- Spinlocks ------------------------
@@ -737,6 +746,14 @@ bool xPortcheckValidStackMem(const void *ptr);
 #define portVALID_TCB_MEM(ptr) xPortCheckValidTCBMem(ptr)
 #define portVALID_STACK_MEM(ptr) xPortcheckValidStackMem(ptr)
 
+
+
+/* ---------------------------------------------------- Deprecate ------------------------------------------------------
+ * - Pull in header containing deprecated macros here
+ * ------------------------------------------------------------------------------------------------------------------ */
+
+#include "portmacro_deprecated.h"
+
 #ifdef __cplusplus
 }
 #endif

tools/sdk/esp32/include/freertos/port/xtensa/include/freertos/portmacro_deprecated.h

@@ -0,0 +1,34 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/* ---------------------------------------------------- Deprecate ------------------------------------------------------
+ * - Macros or functions that should be deprecated in v5.0, then removed in the next major release
+ * - Kept as not to cause a breaking change
+ * - Include this header at the end of portmacro.h
+ * ------------------------------------------------------------------------------------------------------------------ */
+
+/**
+ * @brief Disable interrupts in a nested manner
+ *
+ * Does the exact same thing as portSET_INTERRUPT_MASK_FROM_ISR()
+ *
+ * @deprecated This function is deprecated. Call portSET_INTERRUPT_MASK_FROM_ISR() instead
+ */
+static inline __attribute__((deprecated)) UBaseType_t portENTER_CRITICAL_NESTED(void) {
+    return portSET_INTERRUPT_MASK_FROM_ISR();
+}
+
+/**
+ * @brief Reenables interrupts in a nested manner
+ *
+ * Does the exact same thing as portCLEAR_INTERRUPT_MASK_FROM_ISR()
+ *
+ * @deprecated This function is deprecated. Call portCLEAR_INTERRUPT_MASK_FROM_ISR() instead
+ */
+static inline void __attribute__((deprecated)) portEXIT_CRITICAL_NESTED(UBaseType_t prev_level)
+{
+    portCLEAR_INTERRUPT_MASK_FROM_ISR(prev_level);
+}

tools/sdk/esp32/include/hal/esp32/include/hal/gpio_ll.h

@@ -239,7 +239,7 @@ static inline void gpio_ll_get_intr_status(gpio_dev_t *hw, uint32_t core_id, uin
   */
 static inline void gpio_ll_get_intr_status_high(gpio_dev_t *hw, uint32_t core_id, uint32_t *status)
 {
-    *status = (core_id == 0) ? HAL_FORCE_READ_U32_REG_FIELD(hw->pcpu_int1, intr) : HAL_FORCE_READ_U32_REG_FIELD(hw->pcpu_int1, intr);
+    *status = (core_id == 0) ? HAL_FORCE_READ_U32_REG_FIELD(hw->pcpu_int1, intr) : HAL_FORCE_READ_U32_REG_FIELD(hw->acpu_int1, intr);
 }
 
 /**