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Merged
merged 2 commits into from
Dec 14, 2021
Merged

Add DPU ESP32 variant #5884

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36bdda1
Add DPU ESP32
TAMCTec Nov 13, 2021
5d49ed5
Merge branch 'master' into master
me-no-dev Dec 14, 2021
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109 changes: 109 additions & 0 deletions boards.txt
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Original file line number Diff line number Diff line change
Expand Up @@ -10036,6 +10036,115 @@ franzininho_wifi_msc_esp32s2.menu.DebugLevel.verbose.build.code_debug=5

##############################################################

dpu_esp32.name=DPU ESP32

dpu_esp32.upload.tool=esptool_py
dpu_esp32.upload.maximum_size=3342336
dpu_esp32.upload.maximum_data_size=327680
dpu_esp32.upload.flags=
dpu_esp32.upload.extra_flags=

dpu_esp32.serial.disableDTR=true
dpu_esp32.serial.disableRTS=true

dpu_esp32.build.tarch=xtensa
dpu_esp32.build.bootloader_addr=0x1000
dpu_esp32.build.target=esp32
dpu_esp32.build.mcu=esp32
dpu_esp32.build.core=esp32
dpu_esp32.build.variant=dpu_esp32
dpu_esp32.build.board=DPU_ESP32

dpu_esp32.build.f_cpu=240000000L
dpu_esp32.build.flash_size=8MB
dpu_esp32.build.flash_freq=40m
dpu_esp32.build.flash_mode=dio
dpu_esp32.build.boot=dio
dpu_esp32.build.partitions=default_8MB
dpu_esp32.build.defines=-DBOARD_HAS_PSRAM -mfix-esp32-psram-cache-issue -mfix-esp32-psram-cache-strategy=memw
dpu_esp32.build.extra_libs=

dpu_esp32.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS)
dpu_esp32.menu.PartitionScheme.default.build.partitions=default
dpu_esp32.menu.PartitionScheme.default.upload.maximum_size=1310720
dpu_esp32.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS)
dpu_esp32.menu.PartitionScheme.defaultffat.build.partitions=default_ffat
dpu_esp32.menu.PartitionScheme.defaultffat.upload.maximum_size=1310720
dpu_esp32.menu.PartitionScheme.default_8MB=8M Flash (3MB APP/1.5MB FAT)
dpu_esp32.menu.PartitionScheme.default_8MB.build.partitions=default_8MB
dpu_esp32.menu.PartitionScheme.default_8MB.upload.maximum_size=3342336
dpu_esp32.menu.PartitionScheme.minimal=Minimal (1.3MB APP/700KB SPIFFS)
dpu_esp32.menu.PartitionScheme.minimal.build.partitions=minimal
dpu_esp32.menu.PartitionScheme.minimal.upload.maximum_size=1310720
dpu_esp32.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS)
dpu_esp32.menu.PartitionScheme.no_ota.build.partitions=no_ota
dpu_esp32.menu.PartitionScheme.no_ota.upload.maximum_size=2097152
dpu_esp32.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS)
dpu_esp32.menu.PartitionScheme.noota_3g.build.partitions=noota_3g
dpu_esp32.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576
dpu_esp32.menu.PartitionScheme.noota_ffat=No OTA (2MB APP/2MB FATFS)
dpu_esp32.menu.PartitionScheme.noota_ffat.build.partitions=noota_ffat
dpu_esp32.menu.PartitionScheme.noota_ffat.upload.maximum_size=2097152
dpu_esp32.menu.PartitionScheme.noota_3gffat=No OTA (1MB APP/3MB FATFS)
dpu_esp32.menu.PartitionScheme.noota_3gffat.build.partitions=noota_3gffat
dpu_esp32.menu.PartitionScheme.noota_3gffat.upload.maximum_size=1048576
dpu_esp32.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS)
dpu_esp32.menu.PartitionScheme.huge_app.build.partitions=huge_app
dpu_esp32.menu.PartitionScheme.huge_app.upload.maximum_size=3145728
dpu_esp32.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (1.9MB APP with OTA/190KB SPIFFS)
dpu_esp32.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs
dpu_esp32.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080
dpu_esp32.menu.PartitionScheme.fatflash=16M Flash (2MB APP/12.5MB FAT)
dpu_esp32.menu.PartitionScheme.fatflash.build.partitions=ffat

dpu_esp32.menu.FlashMode.qio=QIO
dpu_esp32.menu.FlashMode.qio.build.flash_mode=dio
dpu_esp32.menu.FlashMode.qio.build.boot=qio
dpu_esp32.menu.FlashMode.dio=DIO
dpu_esp32.menu.FlashMode.dio.build.flash_mode=dio
dpu_esp32.menu.FlashMode.dio.build.boot=dio
dpu_esp32.menu.FlashMode.qout=QOUT
dpu_esp32.menu.FlashMode.qout.build.flash_mode=dout
dpu_esp32.menu.FlashMode.qout.build.boot=qout
dpu_esp32.menu.FlashMode.dout=DOUT
dpu_esp32.menu.FlashMode.dout.build.flash_mode=dout
dpu_esp32.menu.FlashMode.dout.build.boot=dout

dpu_esp32.menu.FlashFreq.80=80MHz
dpu_esp32.menu.FlashFreq.80.build.flash_freq=80m
dpu_esp32.menu.FlashFreq.40=40MHz
dpu_esp32.menu.FlashFreq.40.build.flash_freq=40m

dpu_esp32.menu.UploadSpeed.921600=921600
dpu_esp32.menu.UploadSpeed.921600.upload.speed=921600
dpu_esp32.menu.UploadSpeed.115200=115200
dpu_esp32.menu.UploadSpeed.115200.upload.speed=115200
dpu_esp32.menu.UploadSpeed.256000.windows=256000
dpu_esp32.menu.UploadSpeed.256000.upload.speed=256000
dpu_esp32.menu.UploadSpeed.230400.windows.upload.speed=256000
dpu_esp32.menu.UploadSpeed.230400=230400
dpu_esp32.menu.UploadSpeed.230400.upload.speed=230400
dpu_esp32.menu.UploadSpeed.460800.linux=460800
dpu_esp32.menu.UploadSpeed.460800.macosx=460800
dpu_esp32.menu.UploadSpeed.460800.upload.speed=460800
dpu_esp32.menu.UploadSpeed.512000.windows=512000
dpu_esp32.menu.UploadSpeed.512000.upload.speed=512000

dpu_esp32.menu.DebugLevel.none=None
dpu_esp32.menu.DebugLevel.none.build.code_debug=0
dpu_esp32.menu.DebugLevel.error=Error
dpu_esp32.menu.DebugLevel.error.build.code_debug=1
dpu_esp32.menu.DebugLevel.warn=Warn
dpu_esp32.menu.DebugLevel.warn.build.code_debug=2
dpu_esp32.menu.DebugLevel.info=Info
dpu_esp32.menu.DebugLevel.info.build.code_debug=3
dpu_esp32.menu.DebugLevel.debug=Debug
dpu_esp32.menu.DebugLevel.debug.build.code_debug=4
dpu_esp32.menu.DebugLevel.verbose=Verbose
dpu_esp32.menu.DebugLevel.verbose.build.code_debug=5

##############################################################

sonoff_dualr3.name=Sonoff DUALR3

sonoff_dualr3.upload.tool=esptool_py
Expand Down
64 changes: 64 additions & 0 deletions variants/dpu_esp32/pins_arduino.h
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@@ -0,0 +1,64 @@
#ifndef Pins_Arduino_h
#define Pins_Arduino_h

#include <stdint.h>

#define EXTERNAL_NUM_INTERRUPTS 16
#define NUM_DIGITAL_PINS 40
#define NUM_ANALOG_INPUTS 16

#define analogInputToDigitalPin(p) (((p)<20)?(esp32_adc2gpio[(p)]):-1)
#define digitalPinToInterrupt(p) (((p)<40)?(p):-1)
#define digitalPinHasPWM(p) (p < 34)

static const uint8_t TX = 1;
static const uint8_t RX = 3;

static const uint8_t A0 = 36;
static const uint8_t A3 = 39;
static const uint8_t A4 = 32;
static const uint8_t A5 = 33;
static const uint8_t A6 = 34;
static const uint8_t A7 = 35;
static const uint8_t A10 = 4;
static const uint8_t A11 = 0;
static const uint8_t A12 = 2;
static const uint8_t A13 = 15;
static const uint8_t A14 = 13;
static const uint8_t A15 = 12;
static const uint8_t A16 = 14;
static const uint8_t A17 = 27;
static const uint8_t A18 = 25;
static const uint8_t A19 = 26;

static const uint8_t T0 = 4;
static const uint8_t T1 = 0;
static const uint8_t T2 = 2;
static const uint8_t T3 = 15;
static const uint8_t T4 = 13;
static const uint8_t T5 = 12;
static const uint8_t T6 = 14;
static const uint8_t T7 = 27;
static const uint8_t T8 = 33;
static const uint8_t T9 = 32;

static const uint8_t DAC1 = 25;
static const uint8_t DAC2 = 26;

static const uint8_t SDA = 4;
static const uint8_t SCL = 5;

static const uint8_t MOSI = 13;
static const uint8_t MISO = 12;
static const uint8_t SCK = 14;
static const uint8_t SS = 15;

static const uint8_t TP_RST = 21;
static const uint8_t TP_INT = 19;
static const uint8_t TFT_BL = 18;
static const uint8_t TFT_CS = 15;
static const uint8_t TFT_DC = 27;
static const uint8_t TFT_RST = 32;
static const uint8_t SD_CS = 23;
static const uint8_t SD_CD = 22;
#endif /* Pins_Arduino_h */