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adding uartRxActive to expose the RX state machine status as a boolean value #2457

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Mar 3, 2019
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7 changes: 7 additions & 0 deletions cores/esp32/esp32-hal-uart.c
Original file line number Diff line number Diff line change
Expand Up @@ -558,3 +558,10 @@ uartDetectBaudrate(uart_t *uart)

return default_rates[i];
}

/*
* Returns the status of the RX state machine, if the value is non-zero the state machine is active.
*/
bool uartRxActive(uart_t* uart) {
return uart->dev->status.st_urx_out != 0;
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You do not care if there are bytes in the fifo? Does the state machine signal busy while RX is waiting for timeout since the last byte?

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bytes in the fifo can be detected with uartAvailable, this is specifically checking if the RX state machine is actively processing something or is idle.

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the state machine will have a value of zero if it is idle per the docs:
UART_ST_URX_OUT This register stores the value of the receiver’s finite state machine.
0: RX_IDLE;
1: RX_STRT;
2: RX_DAT0;
3: RX_DAT1;
4: RX_DAT2;
5: RX_DAT3;
6: RX_DAT4;
7: RX_DAT5;
8: RX_DAT6;
9: RX_DAT7;
10: RX_PRTY;
11: RX_STP1;
12:RX_STP2;
13: RX_DL1. (RO)

based on the above the assumption is any value other than zero means RX is active in some form.

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what is RX_DL1 ?

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the thing is... whne you RX data on the uart, after the last stop bit, the uart goes into waiting for timeout state, during which time it expects more bytes. This is normal through a transmission... not all bytes are chained together without small pause. So that is why I am asking :) If you want to use this to switch the mode to TX for example and bus is not shown busy while waiting, you need to watch the RXTO ISR event.

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ok maybe a flag in uart_t to indicate "rx_active" that gets set inside the rxfifo_cnt loop and reset outside that loop?

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or inside _uart_isr set a flag on uart_t to the value of uart->dev->int_st.rxfifo_tout?

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ughh ... needs more thinking

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@me-no-dev me-no-dev Feb 19, 2019

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Maybe something along those lines :)

struct uart_struct_t {
    uart_dev_t * dev;
#if !CONFIG_DISABLE_HAL_LOCKS
    xSemaphoreHandle lock;
#endif
    uint8_t num;
    xQueueHandle queue;
    intr_handle_t intr_handle;
    bool rx_busy; //new property, set to false by rxfifo_tout in ISR
};

bool uartRxActive(uart_t* uart){
    if(!uart->rxbusy && uart->dev->status.st_urx_out != 0){
        //this can still fail if it happened to ask while waiting for tout
        uart->rxbusy = true;
    }
    return uart->rxbusy;
}

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@me-no-dev I didn't get a chance to test your update above, did you implement this or is it still TBD?

}
2 changes: 2 additions & 0 deletions cores/esp32/esp32-hal-uart.h
Original file line number Diff line number Diff line change
Expand Up @@ -74,6 +74,8 @@ int uartGetDebug();

unsigned long uartDetectBaudrate(uart_t *uart);

bool uartRxActive(uart_t* uart);

#ifdef __cplusplus
}
#endif
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