_uart_isr use wr_addr != rd_addr as test for internal queue not empty

[qt1]

This is a possible fix for uart fifo problem.

[lbernstone]

Fixes #1824

[me-no-dev]

Done! and thanks :)

[cv007]

arduino-esp32/cores/esp32/esp32-hal-uart.c

Line 83 in 85032b2

while(uart->dev->status.rxfifo_cnt || (uart->dev->mem_rx_status.wr_addr != uart->dev->mem_rx_status.rd_addr)) {

the above change worked for me
(ran several days with no problem- previously the rxfifo_cnt would 'lose' about a dozen bytes a day- the bytes were never missing, its just the rxfifo_cnt was returning 0 when there were bytes available, which the rd/wr addr compare now solves)

but maybe this can simply be reduced to-
while(uart->dev->mem_rx_status.wr_addr != uart->dev->mem_rx_status.rd_addr) {
as I don't see any need to check the 'unreliable' rxfifo_cnt
if rxfifo_cnt == 0, then wr_addr/rd_addr has to be compared to catch the possibly 'bad' rxfifo_cnt
if rxfifo_cnt != 0, then wr_addr != rd_addr will also be true
so just check wr_addr/rd_addr
(I also tried this for a few days with no problem)

related-

arduino-esp32/cores/esp32/esp32-hal-uart.c

Line 342 in 85032b2

while(uart->dev->status.rxfifo_cnt != 0 || (uart->dev->mem_rx_status.wr_addr != uart->dev->mem_rx_status.rd_addr)) {

in uartFlush-

this also could be reduced to-
while(uart->dev->mem_rx_status.wr_addr != uart->dev->mem_rx_status.rd_addr) {

although in both cases the rxfifo_cnt check is harmless if left as-is

It seems the reading of rxfifo_cnt only occurs in this file, so any problem rxfifo_cnt seems to have should now be taken care of :)

[ouraborous]

Implementing this fix helped in my code, seems like a serious silicon issue that is not documented in the errata.