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Merged
merged 28 commits into from
Sep 24, 2024
Merged

feat(esp32p4): Add initial ESP32-P4 support #10358

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fcd64f7
feat(esp32p4): Initial changes required for ESP32-P4
Jason2866 Aug 20, 2024
a1c1ccb
fix(esp32p4): Fix lib builder errors
lucasssvaz Sep 19, 2024
ea83f5a
change(esp32p4): Unhide board
lucasssvaz Sep 19, 2024
bcc55ea
ci(esp32p4): Add ESP32-P4 to workflow
lucasssvaz Sep 19, 2024
394dd1b
change(esptool): Update esptool to 4.8.0
lucasssvaz Sep 19, 2024
03d6e32
fix(build): Fix redefinition errors
lucasssvaz Sep 19, 2024
5c22a28
fix(build): Remove old commands
lucasssvaz Sep 19, 2024
0a37668
change(esptool): Remove unsupported 32-bit tools
lucasssvaz Sep 19, 2024
979b16b
fix(get.py): Force exe generation
lucasssvaz Sep 19, 2024
26218d4
Revert "fix(get.py): Force exe generation"
lucasssvaz Sep 19, 2024
b23a2fb
fix(get.py): Fix system check
lucasssvaz Sep 19, 2024
488740b
change(tools): Push generated binaries to PR
github-actions[bot] Sep 19, 2024
72643fa
ci(esp32p4): Add missing ESP32-P4 entries
lucasssvaz Sep 19, 2024
e6cf7dc
fix(esp32p4): Add chip info
lucasssvaz Sep 20, 2024
62fef78
fix(esp32p4): Fix build commands
lucasssvaz Sep 20, 2024
149edfa
docs(esp32p4): Add missing references to P4
lucasssvaz Sep 20, 2024
e372320
fix(esp32p4): Fix clock sources definitions
lucasssvaz Sep 21, 2024
a8e1fdf
fix(esp32p4): Set CPU frequency to 360 MHz so it is stable in all chips
lucasssvaz Sep 21, 2024
fb3443d
refactor(esp32p4): Change preprocessor conditionals for maintainability
lucasssvaz Sep 21, 2024
f72fc69
fix(esp32p4): Add missing menu options
lucasssvaz Sep 22, 2024
f1b126c
fix(esp32p4): Mark as not in development json in readme
lucasssvaz Sep 24, 2024
b4f535a
fix(esp32p4): Add P4 to ci.json files
lucasssvaz Sep 24, 2024
24efbdd
ci(pre-commit): Apply automatic fixes
pre-commit-ci-lite[bot] Sep 24, 2024
09c0883
fix(get.py): Remove unused include
lucasssvaz Sep 24, 2024
50befb5
ci(pre-commit): Apply automatic fixes
pre-commit-ci-lite[bot] Sep 24, 2024
5913778
change(tools): Push generated binaries to PR
github-actions[bot] Sep 24, 2024
c882a84
ci(pre-commit): Apply automatic fixes
pre-commit-ci-lite[bot] Sep 24, 2024
148b633
fix(ci.json): Fix formatting
lucasssvaz Sep 24, 2024
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1 change: 1 addition & 0 deletions README.md
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Expand Up @@ -59,6 +59,7 @@ Here are the ESP32 series supported by the Arduino-ESP32 project:
| ESP32-S3 | Yes | Yes | [ESP32-S3](https://www.espressif.com/sites/default/files/documentation/esp32-s3_datasheet_en.pdf) |
| ESP32-C6 | Yes | Yes | [ESP32-C6](https://www.espressif.com/sites/default/files/documentation/esp32-c6_datasheet_en.pdf) |
| ESP32-H2 | Yes | Yes | [ESP32-H2](https://www.espressif.com/sites/default/files/documentation/esp32-h2_datasheet_en.pdf) |
| ESP32-P4 | No | Yes | ESP32-P4 |

> [!NOTE]
> ESP32-C2 is also supported by Arduino-ESP32 but requires rebuilding the static libraries. This is not trivial and requires a good understanding of the ESP-IDF
Expand Down
6 changes: 6 additions & 0 deletions cores/esp32/Esp.cpp
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Expand Up @@ -60,6 +60,9 @@ extern "C" {
#elif CONFIG_IDF_TARGET_ESP32H2
#include "esp32h2/rom/spi_flash.h"
#define ESP_FLASH_IMAGE_BASE 0x0000 // Esp32h2 is located at 0x0000
#elif CONFIG_IDF_TARGET_ESP32P4
#include "esp32p4/rom/spi_flash.h"
#define ESP_FLASH_IMAGE_BASE 0x2000 // Esp32p4 is located at 0x2000
#else
#error Target CONFIG_IDF_TARGET is not supported
#endif
Expand Down Expand Up @@ -335,6 +338,8 @@ uint32_t EspClass::getFlashChipSpeed(void) {
return magicFlashChipSpeed(fhdr.spi_speed);
}

// FIXME for P4
#if !defined(CONFIG_IDF_TARGET_ESP32P4)
FlashMode_t EspClass::getFlashChipMode(void) {
#if CONFIG_IDF_TARGET_ESP32S2
uint32_t spi_ctrl = REG_READ(PERIPHS_SPI_FLASH_CTRL);
Expand All @@ -361,6 +366,7 @@ FlashMode_t EspClass::getFlashChipMode(void) {
}
return (FM_DOUT);
}
#endif // if !defined(CONFIG_IDF_TARGET_ESP32P4)

uint32_t EspClass::magicFlashChipSize(uint8_t byte) {
/*
Expand Down
12 changes: 12 additions & 0 deletions cores/esp32/HardwareSerial.h
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Expand Up @@ -125,6 +125,8 @@ typedef enum {
#define SOC_RX0 (gpio_num_t)17
#elif CONFIG_IDF_TARGET_ESP32H2
#define SOC_RX0 (gpio_num_t)23
#elif CONFIG_IDF_TARGET_ESP32P4
#define SOC_RX0 (gpio_num_t)38
#endif
#endif

Expand All @@ -141,6 +143,8 @@ typedef enum {
#define SOC_TX0 (gpio_num_t)16
#elif CONFIG_IDF_TARGET_ESP32H2
#define SOC_TX0 (gpio_num_t)24
#elif CONFIG_IDF_TARGET_ESP32P4
#define SOC_TX0 (gpio_num_t)37
#endif
#endif

Expand All @@ -162,6 +166,8 @@ typedef enum {
#define RX1 (gpio_num_t)4
#elif CONFIG_IDF_TARGET_ESP32H2
#define RX1 (gpio_num_t)0
#elif CONFIG_IDF_TARGET_ESP32P4
#define RX1 (gpio_num_t)11
#endif
#endif

Expand All @@ -180,6 +186,8 @@ typedef enum {
#define TX1 (gpio_num_t)5
#elif CONFIG_IDF_TARGET_ESP32H2
#define TX1 (gpio_num_t)1
#elif CONFIG_IDF_TARGET_ESP32P4
#define TX1 (gpio_num_t)10
#endif
#endif
#endif /* SOC_UART_HP_NUM > 1 */
Expand All @@ -192,6 +200,8 @@ typedef enum {
#define RX2 (gpio_num_t)4
#elif CONFIG_IDF_TARGET_ESP32S3
#define RX2 (gpio_num_t)19
#elif CONFIG_IDF_TARGET_ESP32P4
#define RX2 (gpio_num_t)15
#endif
#endif

Expand All @@ -200,6 +210,8 @@ typedef enum {
#define TX2 (gpio_num_t)25
#elif CONFIG_IDF_TARGET_ESP32S3
#define TX2 (gpio_num_t)20
#elif CONFIG_IDF_TARGET_ESP32P4
#define TX2 (gpio_num_t)14
#endif
#endif
#endif /* SOC_UART_HP_NUM > 2 */
Expand Down
10 changes: 5 additions & 5 deletions cores/esp32/esp32-hal-adc.c
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Expand Up @@ -75,7 +75,7 @@ static bool adcDetachBus(void *pin) {
if (err != ESP_OK) {
return false;
}
#elif !defined(CONFIG_IDF_TARGET_ESP32H2)
#elif (!defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4))
err = adc_cali_delete_scheme_line_fitting(adc_handle[adc_unit].adc_cali_handle);
if (err != ESP_OK) {
return false;
Expand Down Expand Up @@ -127,7 +127,7 @@ esp_err_t __analogChannelConfig(adc_bitwidth_t width, adc_attenuation_t atten, i
log_e("adc_cali_create_scheme_curve_fitting failed with error: %d", err);
return err;
}
#elif !defined(CONFIG_IDF_TARGET_ESP32H2) //ADC_CALI_SCHEME_LINE_FITTING_SUPPORTED
#elif (!defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4)) //ADC_CALI_SCHEME_LINE_FITTING_SUPPORTED
log_d("Deleting ADC_UNIT_%d line cali handle", adc_unit);
err = adc_cali_delete_scheme_line_fitting(adc_handle[adc_unit].adc_cali_handle);
if (err != ESP_OK) {
Expand Down Expand Up @@ -310,7 +310,7 @@ uint32_t __analogReadMilliVolts(uint8_t pin) {
.bitwidth = __analogWidth,
};
err = adc_cali_create_scheme_curve_fitting(&cali_config, &adc_handle[adc_unit].adc_cali_handle);
#elif !defined(CONFIG_IDF_TARGET_ESP32H2) //ADC_CALI_SCHEME_LINE_FITTING_SUPPORTED
#elif (!defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4)) //ADC_CALI_SCHEME_LINE_FITTING_SUPPORTED
adc_cali_line_fitting_config_t cali_config = {
.unit_id = adc_unit,
.bitwidth = __analogWidth,
Expand Down Expand Up @@ -379,7 +379,7 @@ static bool adcContinuousDetachBus(void *adc_unit_number) {
if (err != ESP_OK) {
return false;
}
#elif !defined(CONFIG_IDF_TARGET_ESP32H2)
#elif (!defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4))
err = adc_cali_delete_scheme_line_fitting(adc_handle[adc_unit].adc_cali_handle);
if (err != ESP_OK) {
return false;
Expand Down Expand Up @@ -552,7 +552,7 @@ bool analogContinuous(const uint8_t pins[], size_t pins_count, uint32_t conversi
.bitwidth = __adcContinuousWidth,
};
err = adc_cali_create_scheme_curve_fitting(&cali_config, &adc_handle[adc_unit].adc_cali_handle);
#elif !defined(CONFIG_IDF_TARGET_ESP32H2) //ADC_CALI_SCHEME_LINE_FITTING_SUPPORTED
#elif (!defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4)) //ADC_CALI_SCHEME_LINE_FITTING_SUPPORTED
adc_cali_line_fitting_config_t cali_config = {
.unit_id = adc_unit,
.bitwidth = __adcContinuousWidth,
Expand Down
14 changes: 8 additions & 6 deletions cores/esp32/esp32-hal-cpu.c
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Expand Up @@ -19,7 +19,7 @@
#include "esp_attr.h"
#include "esp_log.h"
#include "soc/rtc.h"
#if !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2)
#if !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4)
#include "soc/rtc_cntl_reg.h"
#include "soc/syscon_reg.h"
#endif
Expand All @@ -46,6 +46,8 @@
#include "esp32c6/rom/rtc.h"
#elif CONFIG_IDF_TARGET_ESP32H2
#include "esp32h2/rom/rtc.h"
#elif CONFIG_IDF_TARGET_ESP32P4
#include "esp32p4/rom/rtc.h"
#else
#error Target CONFIG_IDF_TARGET is not supported
#endif
Expand Down Expand Up @@ -161,7 +163,7 @@ bool removeApbChangeCallback(void *arg, apb_change_cb_t cb) {
}

static uint32_t calculateApb(rtc_cpu_freq_config_t *conf) {
#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H2
#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4
return APB_CLK_FREQ;
#else
if (conf->freq_mhz >= 80) {
Expand All @@ -177,7 +179,7 @@ bool setCpuFrequencyMhz(uint32_t cpu_freq_mhz) {
rtc_cpu_freq_config_t conf, cconf;
uint32_t capb, apb;
//Get XTAL Frequency and calculate min CPU MHz
#ifndef CONFIG_IDF_TARGET_ESP32H2
#if (!defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4))
rtc_xtal_freq_t xtal = rtc_clk_xtal_freq_get();
#endif
#if CONFIG_IDF_TARGET_ESP32
Expand All @@ -193,7 +195,7 @@ bool setCpuFrequencyMhz(uint32_t cpu_freq_mhz) {
}
}
#endif
#ifndef CONFIG_IDF_TARGET_ESP32H2
#if (!defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4))
if (cpu_freq_mhz > xtal && cpu_freq_mhz != 240 && cpu_freq_mhz != 160 && cpu_freq_mhz != 120 && cpu_freq_mhz != 80) {
if (xtal >= RTC_XTAL_FREQ_40M) {
log_e("Bad frequency: %u MHz! Options are: 240, 160, 120, 80, %u, %u and %u MHz", cpu_freq_mhz, xtal, xtal / 2, xtal / 4);
Expand Down Expand Up @@ -235,7 +237,7 @@ bool setCpuFrequencyMhz(uint32_t cpu_freq_mhz) {
}
//Make the frequency change
rtc_clk_cpu_freq_set_config_fast(&conf);
#if !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2)
#if !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4)
if (capb != apb) {
//Update REF_TICK (uncomment if REF_TICK is different than 1MHz)
//if(conf.freq_mhz < 80){
Expand All @@ -248,7 +250,7 @@ bool setCpuFrequencyMhz(uint32_t cpu_freq_mhz) {
}
#endif
//Update FreeRTOS Tick Divisor
#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4

#elif CONFIG_IDF_TARGET_ESP32S3

Expand Down
46 changes: 41 additions & 5 deletions cores/esp32/esp32-hal-i2c-slave.c
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Expand Up @@ -41,21 +41,42 @@
#include "esp_intr_alloc.h"
#include "soc/i2c_reg.h"
#include "soc/i2c_struct.h"
#include "soc/periph_defs.h"
#include "hal/i2c_ll.h"
#include "hal/clk_gate_ll.h"
#include "esp32-hal-log.h"
#include "esp32-hal-i2c-slave.h"
#include "esp32-hal-periman.h"
#include "esp_private/periph_ctrl.h"

#if SOC_PERIPH_CLK_CTRL_SHARED
#define I2C_CLOCK_SRC_ATOMIC() PERIPH_RCC_ATOMIC()
#else
#define I2C_CLOCK_SRC_ATOMIC()
#endif

#if !SOC_RCC_IS_INDEPENDENT
#define I2C_RCC_ATOMIC() PERIPH_RCC_ATOMIC()
#else
#define I2C_RCC_ATOMIC()
#endif

#define I2C_SLAVE_USE_RX_QUEUE 0 // 1: Queue, 0: RingBuffer

#if !defined(CONFIG_IDF_TARGET_ESP32P4)
#if SOC_HP_I2C_NUM > 1
#define I2C_SCL_IDX(p) ((p == 0) ? I2CEXT0_SCL_OUT_IDX : ((p == 1) ? I2CEXT1_SCL_OUT_IDX : 0))
#define I2C_SDA_IDX(p) ((p == 0) ? I2CEXT0_SDA_OUT_IDX : ((p == 1) ? I2CEXT1_SDA_OUT_IDX : 0))
#else
#define I2C_SCL_IDX(p) I2CEXT0_SCL_OUT_IDX
#define I2C_SDA_IDX(p) I2CEXT0_SDA_OUT_IDX
#endif
#endif // !defined(CONFIG_IDF_TARGET_ESP32P4)

#ifdef CONFIG_IDF_TARGET_ESP32P4
#define I2C_SCL_IDX(p) ((p == 0) ? I2C0_SCL_PAD_OUT_IDX : ((p == 1) ? I2C1_SCL_PAD_OUT_IDX : 0))
#define I2C_SDA_IDX(p) ((p == 0) ? I2C0_SDA_PAD_OUT_IDX : ((p == 1) ? I2C1_SDA_PAD_OUT_IDX : 0))
#endif // ifdef CONFIG_IDF_TARGET_ESP32P4

#if CONFIG_IDF_TARGET_ESP32
#define I2C_TXFIFO_WM_INT_ENA I2C_TXFIFO_EMPTY_INT_ENA
Expand Down Expand Up @@ -173,7 +194,7 @@ static inline void i2c_ll_stretch_clr(i2c_dev_t *hw) {
}

static inline bool i2c_ll_slave_addressed(i2c_dev_t *hw) {
#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H2
#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4
return hw->sr.slave_addressed;
#else
return hw->status_reg.slave_addressed;
Expand All @@ -182,7 +203,7 @@ static inline bool i2c_ll_slave_addressed(i2c_dev_t *hw) {

static inline bool i2c_ll_slave_rw(i2c_dev_t *hw) //not exposed by hal_ll
{
#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H2
#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4
return hw->sr.slave_rw;
#else
return hw->status_reg.slave_rw;
Expand Down Expand Up @@ -306,14 +327,15 @@ esp_err_t i2cSlaveInit(uint8_t num, int sda, int scl, uint16_t slaveID, uint32_t
frequency = 100000L;
}
frequency = (frequency * 5) / 4;

#if !defined(CONFIG_IDF_TARGET_ESP32P4)
if (i2c->num == 0) {
periph_ll_enable_clk_clear_rst(PERIPH_I2C0_MODULE);
#if SOC_HP_I2C_NUM > 1
} else {
periph_ll_enable_clk_clear_rst(PERIPH_I2C1_MODULE);
#endif
}
#endif // !defined(CONFIG_IDF_TARGET_ESP32P4)

i2c_ll_slave_init(i2c->dev);
i2c_ll_slave_set_fifo_mode(i2c->dev, true);
Expand Down Expand Up @@ -341,12 +363,22 @@ esp_err_t i2cSlaveInit(uint8_t num, int sda, int scl, uint16_t slaveID, uint32_t

if (!i2c->intr_handle) {
uint32_t flags = ESP_INTR_FLAG_LOWMED | ESP_INTR_FLAG_SHARED;
#if !defined(CONFIG_IDF_TARGET_ESP32P4)
if (i2c->num == 0) {
ret = esp_intr_alloc(ETS_I2C_EXT0_INTR_SOURCE, flags, &i2c_slave_isr_handler, i2c, &i2c->intr_handle);
#if SOC_HP_I2C_NUM > 1
} else {
ret = esp_intr_alloc(ETS_I2C_EXT1_INTR_SOURCE, flags, &i2c_slave_isr_handler, i2c, &i2c->intr_handle);
#endif
#endif // !defined(CONFIG_IDF_TARGET_ESP32P4)
#ifdef CONFIG_IDF_TARGET_ESP32P4
if (i2c->num == 0) {
ret = esp_intr_alloc(ETS_I2C0_INTR_SOURCE, flags, &i2c_slave_isr_handler, i2c, &i2c->intr_handle);
#if SOC_I2C_NUM > 1
} else {
ret = esp_intr_alloc(ETS_I2C1_INTR_SOURCE, flags, &i2c_slave_isr_handler, i2c, &i2c->intr_handle);
#endif
#endif // #ifdef CONFIG_IDF_TARGET_ESP32P4
}

if (ret != ESP_OK) {
Expand Down Expand Up @@ -516,10 +548,14 @@ static bool i2c_slave_set_frequency(i2c_slave_struct_t *i2c, uint32_t clk_speed)
i2c_hal_clk_config_t clk_cal;
#if SOC_I2C_SUPPORT_APB
i2c_ll_master_cal_bus_clk(APB_CLK_FREQ, clk_speed, &clk_cal);
i2c_ll_set_source_clk(i2c->dev, SOC_MOD_CLK_APB); /*!< I2C source clock from APB, 80M*/
I2C_CLOCK_SRC_ATOMIC() {
i2c_ll_set_source_clk(i2c->dev, SOC_MOD_CLK_APB); /*!< I2C source clock from APB, 80M*/
}
#elif SOC_I2C_SUPPORT_XTAL
i2c_ll_master_cal_bus_clk(XTAL_CLK_FREQ, clk_speed, &clk_cal);
i2c_ll_set_source_clk(i2c->dev, SOC_MOD_CLK_XTAL); /*!< I2C source clock from XTAL, 40M */
I2C_CLOCK_SRC_ATOMIC() {
i2c_ll_set_source_clk(i2c->dev, SOC_MOD_CLK_XTAL); /*!< I2C source clock from XTAL, 40M */
}
#endif
i2c_ll_set_txfifo_empty_thr(i2c->dev, a);
i2c_ll_set_rxfifo_full_thr(i2c->dev, SOC_I2C_FIFO_LEN - a);
Expand Down
17 changes: 16 additions & 1 deletion cores/esp32/esp32-hal-i2c.c
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Expand Up @@ -29,6 +29,19 @@
#include "hal/i2c_ll.h"
#include "driver/i2c.h"
#include "esp32-hal-periman.h"
#include "esp_private/periph_ctrl.h"

#if SOC_PERIPH_CLK_CTRL_SHARED
#define I2C_CLOCK_SRC_ATOMIC() PERIPH_RCC_ATOMIC()
#else
#define I2C_CLOCK_SRC_ATOMIC()
#endif

#if !SOC_RCC_IS_INDEPENDENT
#define I2C_RCC_ATOMIC() PERIPH_RCC_ATOMIC()
#else
#define I2C_RCC_ATOMIC()
#endif

#if SOC_I2C_SUPPORT_APB || SOC_I2C_SUPPORT_XTAL
#include "esp_private/esp_clk.h"
Expand Down Expand Up @@ -388,7 +401,9 @@ esp_err_t i2cSetClock(uint8_t i2c_num, uint32_t frequency) {
periph_rtc_dig_clk8m_enable();
}
#endif
i2c_hal_set_bus_timing(&(hal), frequency, i2c_clk_alloc[src_clk].clk, i2c_clk_alloc[src_clk].clk_freq);
I2C_CLOCK_SRC_ATOMIC() {
i2c_hal_set_bus_timing(&(hal), frequency, i2c_clk_alloc[src_clk].clk, i2c_clk_alloc[src_clk].clk_freq);
}
bus[i2c_num].frequency = frequency;
//Clock Stretching Timeout: 20b:esp32, 5b:esp32-c3, 24b:esp32-s2
i2c_set_timeout((i2c_port_t)i2c_num, I2C_LL_MAX_TIMEOUT);
Expand Down
10 changes: 10 additions & 0 deletions cores/esp32/esp32-hal-ledc.c
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Expand Up @@ -323,11 +323,21 @@ bool ledcOutputInvert(uint8_t pin, bool out_invert) {
ledc_channel_handle_t *bus = (ledc_channel_handle_t *)perimanGetPinBus(pin, ESP32_BUS_TYPE_LEDC);
if (bus != NULL) {
gpio_set_level(pin, out_invert);
#if !defined(CONFIG_IDF_TARGET_ESP32P4)
#ifdef SOC_LEDC_SUPPORT_HS_MODE
esp_rom_gpio_connect_out_signal(pin, ((bus->channel / 8 == 0) ? LEDC_HS_SIG_OUT0_IDX : LEDC_LS_SIG_OUT0_IDX) + ((bus->channel) % 8), out_invert, 0);
#else
esp_rom_gpio_connect_out_signal(pin, LEDC_LS_SIG_OUT0_IDX + ((bus->channel) % 8), out_invert, 0);
#endif
#endif // !defined(CONFIG_IDF_TARGET_ESP32P4)

#ifdef CONFIG_IDF_TARGET_ESP32P4
#ifdef SOC_LEDC_SUPPORT_HS_MODE
esp_rom_gpio_connect_out_signal(pin, ((bus->channel / 8 == 0) ? LEDC_HS_SIG_OUT0_IDX : LEDC_LS_SIG_OUT_PAD_OUT0_IDX) + ((bus->channel) % 8), out_invert, 0);
#else
esp_rom_gpio_connect_out_signal(pin, LEDC_LS_SIG_OUT_PAD_OUT0_IDX + ((bus->channel) % 8), out_invert, 0);
#endif
#endif // #ifdef CONFIG_IDF_TARGET_ESP32P4
return true;
}
return false;
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2 changes: 2 additions & 0 deletions cores/esp32/esp32-hal-matrix.c
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Original file line number Diff line number Diff line change
Expand Up @@ -32,6 +32,8 @@
#include "esp32c6/rom/gpio.h"
#elif CONFIG_IDF_TARGET_ESP32H2
#include "esp32h2/rom/gpio.h"
#elif CONFIG_IDF_TARGET_ESP32P4
#include "esp32p4/rom/gpio.h"
#else
#error Target CONFIG_IDF_TARGET is not supported
#endif
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4 changes: 3 additions & 1 deletion cores/esp32/esp32-hal-misc.c
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Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -29,7 +29,7 @@
#endif //CONFIG_BT_ENABLED
#include <sys/time.h>
#include "soc/rtc.h"
#if !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2)
#if !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4)
#include "soc/rtc_cntl_reg.h"
#include "soc/syscon_reg.h"
#endif
Expand All @@ -53,6 +53,8 @@
#include "esp32c6/rom/rtc.h"
#elif CONFIG_IDF_TARGET_ESP32H2
#include "esp32h2/rom/rtc.h"
#elif CONFIG_IDF_TARGET_ESP32P4
#include "esp32p4/rom/rtc.h"

#else
#error Target CONFIG_IDF_TARGET is not supported
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