SPI mode inconsistency

[kroggen]

Hi!

I guess there is an inconsistency in the SPI mode assignment.

In the function spiSetDataMode we have:

arduino-esp32/cores/esp32/esp32-hal-spi.c

Lines 333 to 340 in a153f6a

	case SPI_MODE2:
	spi->dev->pin.ck_idle_edge = 1;
	spi->dev->user.ck_out_edge = 1;
	break;
	case SPI_MODE3:
	spi->dev->pin.ck_idle_edge = 1;
	spi->dev->user.ck_out_edge = 0;
	break;

And in the function spiTransaction we have:

arduino-esp32/cores/esp32/esp32-hal-spi.c

Lines 714 to 721 in a153f6a

	case SPI_MODE2:
	spi->dev->pin.ck_idle_edge = 1;
	spi->dev->user.ck_out_edge = 0;
	break;
	case SPI_MODE3:
	spi->dev->pin.ck_idle_edge = 1;
	spi->dev->user.ck_out_edge = 1;
	break;

The user.ck_out_edge value is different.

Here is the spiGetDataMode function:

arduino-esp32/cores/esp32/esp32-hal-spi.c

Lines 308 to 319 in a153f6a

	bool idleEdge = spi->dev->pin.ck_idle_edge;
	bool outEdge = spi->dev->user.ck_out_edge;
	if(idleEdge) {
	if(outEdge) {
	return SPI_MODE3;
	}
	return SPI_MODE2;
	}
	if(outEdge) {
	return SPI_MODE1;
	}
	return SPI_MODE0;

[kroggen]

In my tests with an AD7124-4 device, that uses SPI in mode 3, I got the following results:

1 - Without transactions, using the SPI.setDataMode:

It is working with modes 0 and 3.

2 - With transactions:

It is working with modes 0 and 2.

So I concluded that the spiSetDataMode function is right and the spiTransaction and the spiGetDataMode functions are wrong.

This property of working on 2 modes makes sense when we check the SPI modes operation:

Both modes 0 and 3 sample in the rising edge of the clock pulse.

Notice also that mode 2 shifts out the bit in the rising edge (1) and mode 3 shifts out in the falling edge (0).

*image taken from https://www.allaboutcircuits.com/technical-articles/spi-serial-peripheral-interface/