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Tinyu-ZhaoTinyu-Zhao
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Create M5CoreS3 pins_arduino.h and board (#8161)
* Add M5CoreS3 boards.txt and pins definition * Fix some pins definition
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Diff for: ‎boards.txt

+192
Original file line numberDiff line numberDiff line change
@@ -12265,6 +12265,198 @@ m5stack-core2.menu.EraseFlash.all.upload.erase_cmd=-e
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1226612266
##############################################################
1226712267

12268+
m5stack-cores3.name=M5Stack-CoreS3
12269+
m5stack-cores3.vid.0=0x303a
12270+
m5stack-cores3.pid.0=0x1001
12271+
12272+
m5stack-cores3.bootloader.tool=esptool_py
12273+
m5stack-cores3.bootloader.tool.default=esptool_py
12274+
12275+
m5stack-cores3.upload.tool=esptool_py
12276+
m5stack-cores3.upload.tool.default=esptool_py
12277+
m5stack-cores3.upload.tool.network=esp_ota
12278+
12279+
m5stack-cores3.upload.maximum_size=1310720
12280+
m5stack-cores3.upload.maximum_data_size=327680
12281+
m5stack-cores3.upload.flags=
12282+
m5stack-cores3.upload.extra_flags=
12283+
m5stack-cores3.upload.use_1200bps_touch=false
12284+
m5stack-cores3.upload.wait_for_upload_port=false
12285+
12286+
m5stack-cores3.serial.disableDTR=false
12287+
m5stack-cores3.serial.disableRTS=false
12288+
12289+
m5stack-cores3.build.tarch=xtensa
12290+
m5stack-cores3.build.bootloader_addr=0x0
12291+
m5stack-cores3.build.target=esp32s3
12292+
m5stack-cores3.build.mcu=esp32s3
12293+
m5stack-cores3.build.core=esp32
12294+
m5stack-cores3.build.variant=m5stack_cores3
12295+
m5stack-cores3.build.board=M5STACK_CORES3
12296+
12297+
m5stack-cores3.build.usb_mode=1
12298+
m5stack-cores3.build.cdc_on_boot=0
12299+
m5stack-cores3.build.msc_on_boot=0
12300+
m5stack-cores3.build.dfu_on_boot=0
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m5stack-cores3.build.f_cpu=240000000L
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m5stack-cores3.build.flash_size=4MB
12303+
m5stack-cores3.build.flash_freq=80m
12304+
m5stack-cores3.build.flash_mode=dio
12305+
m5stack-cores3.build.boot=qio
12306+
m5stack-cores3.build.boot_freq=80m
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m5stack-cores3.build.partitions=default
12308+
m5stack-cores3.build.defines=
12309+
m5stack-cores3.build.loop_core=
12310+
m5stack-cores3.build.event_core=
12311+
m5stack-cores3.build.psram_type=qspi
12312+
m5stack-cores3.build.memory_type={build.boot}_{build.psram_type}
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m5stack-cores3.menu.JTAGAdapter.default=Disabled
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m5stack-cores3.menu.JTAGAdapter.default.build.copy_jtag_files=0
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m5stack-cores3.menu.JTAGAdapter.builtin=Integrated USB JTAG
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m5stack-cores3.menu.JTAGAdapter.builtin.build.openocdscript=esp32s3-builtin.cfg
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m5stack-cores3.menu.JTAGAdapter.builtin.build.copy_jtag_files=1
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m5stack-cores3.menu.JTAGAdapter.external=FTDI Adapter
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m5stack-cores3.menu.JTAGAdapter.external.build.openocdscript=esp32s3-ftdi.cfg
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m5stack-cores3.menu.JTAGAdapter.external.build.copy_jtag_files=1
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m5stack-cores3.menu.JTAGAdapter.bridge=ESP USB Bridge
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m5stack-cores3.menu.JTAGAdapter.bridge.build.openocdscript=esp32s3-bridge.cfg
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m5stack-cores3.menu.JTAGAdapter.bridge.build.copy_jtag_files=1
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m5stack-cores3.menu.PSRAM.disabled=Disabled
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m5stack-cores3.menu.PSRAM.disabled.build.defines=
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m5stack-cores3.menu.PSRAM.disabled.build.psram_type=qspi
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m5stack-cores3.menu.PSRAM.enabled=QSPI PSRAM
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m5stack-cores3.menu.PSRAM.enabled.build.defines=-DBOARD_HAS_PSRAM
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m5stack-cores3.menu.PSRAM.enabled.build.psram_type=qspi
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m5stack-cores3.menu.PSRAM.opi=OPI PSRAM
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m5stack-cores3.menu.PSRAM.opi.build.defines=-DBOARD_HAS_PSRAM
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m5stack-cores3.menu.PSRAM.opi.build.psram_type=opi
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m5stack-cores3.menu.FlashMode.qio=QIO 80MHz
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m5stack-cores3.menu.FlashMode.qio.build.flash_mode=dio
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m5stack-cores3.menu.FlashMode.qio.build.boot=qio
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m5stack-cores3.menu.FlashMode.qio.build.boot_freq=80m
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m5stack-cores3.menu.FlashMode.qio.build.flash_freq=80m
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m5stack-cores3.menu.FlashMode.qio120=QIO 120MHz
12342+
m5stack-cores3.menu.FlashMode.qio120.build.flash_mode=dio
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m5stack-cores3.menu.FlashMode.qio120.build.boot=qio
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m5stack-cores3.menu.FlashMode.qio120.build.boot_freq=120m
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m5stack-cores3.menu.FlashMode.qio120.build.flash_freq=80m
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m5stack-cores3.menu.FlashMode.dio=DIO 80MHz
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m5stack-cores3.menu.FlashMode.dio.build.flash_mode=dio
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m5stack-cores3.menu.FlashMode.dio.build.boot=dio
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m5stack-cores3.menu.FlashMode.dio.build.boot_freq=80m
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m5stack-cores3.menu.FlashMode.dio.build.flash_freq=80m
12351+
m5stack-cores3.menu.FlashMode.opi=OPI 80MHz
12352+
m5stack-cores3.menu.FlashMode.opi.build.flash_mode=dout
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m5stack-cores3.menu.FlashMode.opi.build.boot=opi
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m5stack-cores3.menu.FlashMode.opi.build.boot_freq=80m
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m5stack-cores3.menu.FlashMode.opi.build.flash_freq=80m
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m5stack-cores3.menu.FlashSize.4M=4MB (32Mb)
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m5stack-cores3.menu.FlashSize.4M.build.flash_size=4MB
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m5stack-cores3.menu.FlashSize.8M=8MB (64Mb)
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m5stack-cores3.menu.FlashSize.8M.build.flash_size=8MB
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m5stack-cores3.menu.FlashSize.8M.build.partitions=default_8MB
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m5stack-cores3.menu.FlashSize.16M=16MB (128Mb)
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m5stack-cores3.menu.FlashSize.16M.build.flash_size=16MB
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#m5stack-cores3.menu.FlashSize.32M=32MB (256Mb)
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#m5stack-cores3.menu.FlashSize.32M.build.flash_size=32MB
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m5stack-cores3.menu.LoopCore.1=Core 1
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m5stack-cores3.menu.LoopCore.1.build.loop_core=-DARDUINO_RUNNING_CORE=1
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m5stack-cores3.menu.LoopCore.0=Core 0
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m5stack-cores3.menu.LoopCore.0.build.loop_core=-DARDUINO_RUNNING_CORE=0
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m5stack-cores3.menu.EventsCore.1=Core 1
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m5stack-cores3.menu.EventsCore.1.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=1
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m5stack-cores3.menu.EventsCore.0=Core 0
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m5stack-cores3.menu.EventsCore.0.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=0
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m5stack-cores3.menu.USBMode.hwcdc=Hardware CDC and JTAG
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m5stack-cores3.menu.USBMode.hwcdc.build.usb_mode=1
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m5stack-cores3.menu.USBMode.default=USB-OTG (TinyUSB)
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m5stack-cores3.menu.USBMode.default.build.usb_mode=0
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m5stack-cores3.menu.CDCOnBoot.default=Disabled
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m5stack-cores3.menu.CDCOnBoot.default.build.cdc_on_boot=0
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m5stack-cores3.menu.CDCOnBoot.cdc=Enabled
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m5stack-cores3.menu.CDCOnBoot.cdc.build.cdc_on_boot=1
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m5stack-cores3.menu.MSCOnBoot.default=Disabled
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m5stack-cores3.menu.MSCOnBoot.default.build.msc_on_boot=0
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m5stack-cores3.menu.MSCOnBoot.msc=Enabled (Requires USB-OTG Mode)
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m5stack-cores3.menu.MSCOnBoot.msc.build.msc_on_boot=1
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m5stack-cores3.menu.DFUOnBoot.default=Disabled
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m5stack-cores3.menu.DFUOnBoot.default.build.dfu_on_boot=0
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m5stack-cores3.menu.DFUOnBoot.dfu=Enabled (Requires USB-OTG Mode)
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m5stack-cores3.menu.DFUOnBoot.dfu.build.dfu_on_boot=1
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m5stack-cores3.menu.UploadMode.default=UART0 / Hardware CDC
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m5stack-cores3.menu.UploadMode.default.upload.use_1200bps_touch=false
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m5stack-cores3.menu.UploadMode.default.upload.wait_for_upload_port=false
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m5stack-cores3.menu.UploadMode.cdc=USB-OTG CDC (TinyUSB)
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m5stack-cores3.menu.UploadMode.cdc.upload.use_1200bps_touch=true
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m5stack-cores3.menu.UploadMode.cdc.upload.wait_for_upload_port=true
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m5stack-cores3.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS)
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m5stack-cores3.menu.PartitionScheme.default.build.partitions=default
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m5stack-cores3.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS)
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m5stack-cores3.menu.PartitionScheme.defaultffat.build.partitions=default_ffat
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m5stack-cores3.menu.PartitionScheme.default_8MB=8M with spiffs (3MB APP/1.5MB SPIFFS)
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m5stack-cores3.menu.PartitionScheme.default_8MB.build.partitions=default_8MB
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m5stack-cores3.menu.PartitionScheme.default_8MB.upload.maximum_size=3342336
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m5stack-cores3.menu.CPUFreq.240=240MHz (WiFi)
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m5stack-cores3.menu.CPUFreq.240.build.f_cpu=240000000L
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m5stack-cores3.menu.CPUFreq.160=160MHz (WiFi)
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m5stack-cores3.menu.CPUFreq.160.build.f_cpu=160000000L
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m5stack-cores3.menu.CPUFreq.80=80MHz (WiFi)
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m5stack-cores3.menu.CPUFreq.80.build.f_cpu=80000000L
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m5stack-cores3.menu.CPUFreq.40=40MHz
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m5stack-cores3.menu.CPUFreq.40.build.f_cpu=40000000L
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m5stack-cores3.menu.CPUFreq.20=20MHz
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m5stack-cores3.menu.CPUFreq.20.build.f_cpu=20000000L
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m5stack-cores3.menu.CPUFreq.10=10MHz
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m5stack-cores3.menu.CPUFreq.10.build.f_cpu=10000000L
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m5stack-cores3.menu.UploadSpeed.921600=921600
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m5stack-cores3.menu.UploadSpeed.921600.upload.speed=921600
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m5stack-cores3.menu.UploadSpeed.115200=115200
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m5stack-cores3.menu.UploadSpeed.115200.upload.speed=115200
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m5stack-cores3.menu.UploadSpeed.256000.windows=256000
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m5stack-cores3.menu.UploadSpeed.256000.upload.speed=256000
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m5stack-cores3.menu.UploadSpeed.230400.windows.upload.speed=256000
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m5stack-cores3.menu.UploadSpeed.230400=230400
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m5stack-cores3.menu.UploadSpeed.230400.upload.speed=230400
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m5stack-cores3.menu.UploadSpeed.460800.linux=460800
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m5stack-cores3.menu.UploadSpeed.460800.macosx=460800
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m5stack-cores3.menu.UploadSpeed.460800.upload.speed=460800
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m5stack-cores3.menu.UploadSpeed.512000.windows=512000
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m5stack-cores3.menu.UploadSpeed.512000.upload.speed=512000
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m5stack-cores3.menu.DebugLevel.none=None
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m5stack-cores3.menu.DebugLevel.none.build.code_debug=0
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m5stack-cores3.menu.DebugLevel.error=Error
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m5stack-cores3.menu.DebugLevel.error.build.code_debug=1
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m5stack-cores3.menu.DebugLevel.warn=Warn
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m5stack-cores3.menu.DebugLevel.warn.build.code_debug=2
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m5stack-cores3.menu.DebugLevel.info=Info
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m5stack-cores3.menu.DebugLevel.info.build.code_debug=3
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m5stack-cores3.menu.DebugLevel.debug=Debug
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m5stack-cores3.menu.DebugLevel.debug.build.code_debug=4
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m5stack-cores3.menu.DebugLevel.verbose=Verbose
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m5stack-cores3.menu.DebugLevel.verbose.build.code_debug=5
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m5stack-cores3.menu.EraseFlash.none=Disabled
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m5stack-cores3.menu.EraseFlash.none.upload.erase_cmd=
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m5stack-cores3.menu.EraseFlash.all=Enabled
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m5stack-cores3.menu.EraseFlash.all.upload.erase_cmd=-e
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##############################################################
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1226812460
m5stack-timer-cam.name=M5Stack-Timer-CAM
1226912461

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m5stack-timer-cam.bootloader.tool=esptool_py

Diff for: ‎variants/m5stack_cores3/pins_arduino.h

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@@ -0,0 +1,72 @@
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#ifndef Pins_Arduino_h
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#define Pins_Arduino_h
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#include <stdint.h>
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#include "soc/soc_caps.h"
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#define USB_VID 0x303a
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#define USB_PID 0x1001
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#define EXTERNAL_NUM_INTERRUPTS 46
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#define NUM_DIGITAL_PINS 48
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#define NUM_ANALOG_INPUTS 20
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// Some boards have too low voltage on this pin (board design bug)
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// Use different pin with 3V and connect with 48
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// and change this setup for the chosen pin (for example 38)
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static const uint8_t LED_BUILTIN = SOC_GPIO_PIN_COUNT + 48;
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#define BUILTIN_LED LED_BUILTIN // backward compatibility
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#define LED_BUILTIN LED_BUILTIN
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#define RGB_BUILTIN LED_BUILTIN
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#define RGB_BRIGHTNESS 64
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#define analogInputToDigitalPin(p) \
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(((p) < 20) ? (analogChannelToDigitalPin(p)) : -1)
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#define digitalPinToInterrupt(p) (((p) < 48) ? (p) : -1)
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#define digitalPinHasPWM(p) (p < 46)
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static const uint8_t TX = 43;
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static const uint8_t RX = 44;
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static const uint8_t TXD2 = 17;
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static const uint8_t RXD2 = 18;
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static const uint8_t SDA = 12;
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static const uint8_t SCL = 11;
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static const uint8_t SS = 15;
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static const uint8_t MOSI = 37;
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static const uint8_t MISO = 35;
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static const uint8_t SCK = 36;
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static const uint8_t G0 = 0;
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static const uint8_t G1 = 1;
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static const uint8_t G2 = 2;
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static const uint8_t G3 = 3;
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static const uint8_t G4 = 4;
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static const uint8_t G5 = 5;
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static const uint8_t G6 = 6;
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static const uint8_t G7 = 7;
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static const uint8_t G8 = 8;
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static const uint8_t G9 = 9;
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static const uint8_t G11 = 11;
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static const uint8_t G12 = 12;
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static const uint8_t G13 = 13;
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static const uint8_t G14 = 14;
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static const uint8_t G17 = 17;
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static const uint8_t G18 = 18;
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static const uint8_t G19 = 19;
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static const uint8_t G20 = 20;
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static const uint8_t G21 = 21;
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static const uint8_t G33 = 33;
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static const uint8_t G34 = 34;
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static const uint8_t G35 = 35;
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static const uint8_t G36 = 36;
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static const uint8_t G37 = 37;
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static const uint8_t G38 = 38;
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static const uint8_t G45 = 45;
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static const uint8_t G46 = 46;
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static const uint8_t ADC = 10;
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#endif /* Pins_Arduino_h */

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